Quantcast
Channel: Cadence Custom IC Design Forum
Browsing all 4886 articles
Browse latest View live

ANARRAY Layer

ANARRAY is layer that I should be able to see in virtuoso layout Layers (according to PDK) when I search for it, however I don't (I do see ARRAY_VT though), I do have the GDS for the layer but don't...

View Article


Image may be NSFW.
Clik here to view.

Disabled Reliability Report in Reliability Analysis RAK

Hello everyone,I'm going through the RAK to learn about reliability analysis.My problem is that the reliability report is disabled (picture attached) even though I followed the steps described in the...

View Article


Using time of an assert event in ADE Assembler's output expressions

Hi everybody,It is possible to use the time point of an assert in event driven transient simulation through the dynamic parameter option in the GUI or through a paramset file. Is there a way to access...

View Article

How to Create new cell view under specific category

I have the same problem with this post, but don't see any response.https://community.cadence.com/cadence_technology_forums/f/custom-ic-design/52344/assign-new-file-to-category-upon-creation Q:  Can you...

View Article

Spectre X fails to output accurate nutascii formated .raw output file if...

I wasted a bunch of time on this problem and wanted to make a post in case it helps anyone else in the future.  The cause of my problem was that I used the option +postlpresetUsing the netlist and...

View Article


How can I use a schematic parameter (such as R1/r = 10K) in an Explorer...

Say I have a resistor R1 in a schematic where r=10K. I want to use this value of r to calculate another value. I could make r=Rval and set this as a variable in Explorer but then I have to change the...

View Article

How Long to Charge a Power Wheels Battery

If you have purchased a new Power Wheels battery, you might be wondering how long it will take to charge. This is an important factor to consider since it will ensure optimal battery performance and...

View Article

Image may be NSFW.
Clik here to view.

Run/Plot Single Transient Simulation Multiple Times

How do I run a single transient simulation N=100 times using ADE-L/ADE Explorer (GUI) or ADE Assembler (SKILL) & plot it ?

View Article


Image may be NSFW.
Clik here to view.

device checking setup issues

Hi everyone, I'm trying to check device stress for a bootstrap circuit by "Device Checking". For example, in a transient simulation no vds/vgs should exceeds 5.2V. "dochecklimit=yes,...

View Article


Image may be NSFW.
Clik here to view.

passing a string type parameter to veriloga through schematic based design

hello experts, please share some clue:I would like to pass a file name to my veriloga code so it can dump to different log files as needed. but somehow the cdf parameter taking the intended variable...

View Article

Image may be NSFW.
Clik here to view.

How to derive edge phase noise from Output Noise in sampled Pnoise simulation

I m driving a buffer with a clock of 7 GHz, launching a pss simulation and  pnoise sampled at the rising edge of the output ( threshold set at 0). I obtained the following graph for output noise and...

View Article

Engineering

hi, I meet the problems of error in cadence 514:error: " input.scs" 10 No section found with name 'tt' defined in. How can can i solve this , thanks

View Article

Probing wreal4state nets deep in hierarchy adds IE/connectLib element

Cadence version:IUS: 20.09.012MMSIM: 20.10.354My test bench is all digital (functional and systemVerilog, no spectre elements).This test bench checks if a node value (wreal4state) deep in hierarchy is...

View Article


How to insert a probe for stb analysis without disturbing LVS?

Hi,to avoid problems in LVS you can use lvsIgnore, but this is only good for few elements like a pcapacitor. I would like to permanently have a series vdc=0 in my schematics, but to avoid lvs problems...

View Article

Unexpected error message in Assembler on opening design

Hi,from the Test I can do Open design in tab, it works but since some days I also get an error message : Schematic already exists. Do you want to overwrite it?I press no and continue, but pressing yes...

View Article


Issue running Assura/Quantus on design in gpdk045_v_6_0 that uses mimcaps

Hi,I have a version of gpdk045_v_6_0 downloaded that I have been using. Virtuoso/Assura version info:@(#)$CDS: virtuoso version 6.1.8-64b 04/17/2019 00:06 (sjfhw317) $@(#)$CDS: assura_64 version...

View Article

Image may be NSFW.
Clik here to view.

wavefrom is not continous around instant when strobeperiod is changed

Hi. I notice the wavefrom is not continous around the instant when strobeperiod is changed, e.g., a negative drop happens. Then the wavefrom slowly settles back.I can ensure no circuit action during...

View Article


steppreset in .scs file

Hi,I would like to define steppreset as a dynamic parameter in tran simulation. The sim file issection XXXpset_ctrl paramset{time steppreset0 mx8u ax}endsectionThe error info isError found by spectre...

View Article

PAE Contours

I was looking for a post that explains if we can plot PAE Contours on smith chart, found this post PAE Contour - RF Design - Cadence Technology Forums - Cadence Community, but didn't help. I am running...

View Article

nonlinear capacitor and nonlinear current source

Hello,I am trying to model a nonlinear amplifier. I have a relative model in mind but I need to somehow plug in the nonlinear equation for current and the nonlinear capacitors.I have seen in the forum,...

View Article
Browsing all 4886 articles
Browse latest View live


<script src="https://jsc.adskeeper.com/r/s/rssing.com.1596347.js" async> </script>