Probing current of an instance using hidden supply pins
Dear all,I would like to probe the current of an instance using hidden pins (having its voltage net assigned to by a netSet property). There is a soltution for probing the current of an instance using...
View ArticleHow to make sure the subcircuit is defined?
Hi,I run the spectre simulation and get the error like this:Error found by spectre in `invx1_u', during circuit read-in.ERROR (SFE-23): "input.scs" 25: The instance `xMNI1' is referencing an undefined...
View Articlepython script which can connect with virtuoso
anyone provide me info about python script which connect with virtuoso and run some skill command from python script
View ArticleScripting in Simvision
Hi,I would like to know, if it is possible to create simple scripts in TCL to interact with the Simvision Waveform viewer?What I am looking for is to, for example, be able to create markers, read the...
View Articlemaestro' test name not updated
Hi,friendsWhen copying a cell, for example, when using update Instances to copy lib1, cell1 to lib1, cell2, the name of maestro's test will not be automatically updated, and the name of test will still...
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Different THD Results Using thd() function in Calculator and Spectrum in Viva
Dear all, I am currently running transient simulations for my circuit and would like to calculate the total harmonic distortion of the circuit. My spectre version is 23.1.0.362.isr5, and I ran...
View Articleimport .csf file to maestro results output
Hi,friendsI have a csf file that contains several simulated output values. Is there a way to import it into the “Results” of maestro or directly into the “results browser” to view the results and the...
View ArticleSimulation from an imported CSV file
Hello Sir,I was wondering if there's a tutorial or something for a way to simulate and get graphs of a CSV file of voltage over time imported to cadence ? I tried vpwlf and vpwlfm but both don't...
View ArticleHow to use schematic view of a sub-circuit and extracted view of everything else
Hello,I have changed the device parameter in one of sub-circuit and would like to use this in 'schematic view' and everything else in extracted view. I do not have individual extracted views of the...
View ArticleGet test's temperature without leaving assembler window
Hi,friendsIs there a way to quickly get the temperature information set by a test in explorer without leaving the assembler window?like:When I place the mouse pointer over the test in the assembler, a...
View Article[Inquiry about sweep of threshold voltage for MOSFET during simulation]
How can I sweep threshold voltage (Vth) values in a Cadence Virtuoso IC6.1.8-64b.500.20 schematic, while running both Transient and AC analyses?I am using Cadence Virtuoso version 6.1.8-64b,...
View ArticleParasitic Extraction (PEX) - Tool Migration from IC6 to IC23
Dear All,I have been using IC6 for DRC/LVS and PEX for some time and due to technical reason, I had to migrate to IC23.0 version. I am quite familiar with the IC6 PEX procedure of generating a...
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Netlisting 'config' view with SPICE source file... CDF parameter m= on symbol...
Hello,I am successfully netlisting and simulating a testbench 'config' view for Spectre with the primary instance pointing to a SPICE source file... (an extracted netlist w/ parasitics).However, the...
View Articleusing bus pin for inherited connection with AMS
I am running an AMS simulation that includes several gates with inherited supply connections. The ground connection is one of many grounds and uses the bus name GNDA<21>. This all works fine in...
View ArticleNested ddt Operator
I have a Verilog-A script that had previously been used in a competitor's tool suite without issue. In Cadence Spectre though, I have an error telling me:Encountered nested `ddt' operator. Do not nest...
View ArticleTolerance relaxation when calculating DC operating point - impact on accuracy...
Hello,I have a general question on SPECTRE-17191 warning:Warning from spectre during DC analysis `dcOp'. WARNING (SPECTRE-17191): Tolerance relaxation is used to obtain final DC solution which may...
View ArticlecalcVal function works during the simulation, but fails after initiating...
Hi.I'm using Virtuoso 6.1.8-64bWhile constructing an expression to compare the circuit with its nominal working condition, I'm trying to reference the value of an expression for a specific corner. So I...
View ArticlePSS/Pnoise analysis for divider circuit, input is pulse waveform from vsource...
I am simulating a frequency divide by 4 circuit which is flipflop/latch based and I am running pss at divider output frequency and pnoise (simulating the sampled noise analysis, multiple pnoise...
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pxf or pac sampled Explanation
https://community.cadence.com/cadence_technology_forums/f/custom-ic-design/45055/explanation-for-sampled-pxf-analysis-it's still computing the time-averaged transfer function, but sampled at an...
View ArticleParasitic Extraction Failure in Quantus - Assura
Dear All,I’m encountering issues with parasitic extraction from the layout using Quantus - Assura. The PEX run is failing, and the pex.log file shows the following errors:*ERROR* No library model for...
View ArticleLatency to Connect License server
When I try to run simulation , though the simulation is completed but there is latency to find the license server and wait time is quite substantial--- Network Latency Test ---Description: To...
View ArticleThe current direction is different after simulation with different fingers of...
Hi,friendsAfter extracting the dspf file with calibre, the current flowing through the S terminal of the mos tube with 2 fingers inside, one finger Isource is negative and one finger Isource is...
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Problems with genvar and nested for loops in verilog-A after updating the...
Hi everyone,I recently updated several Cadence tools due to end-of-life notices for the versions we were using. After the upgrade, Virtuoso and Spectre launch without issue, but I’m now encountering a...
View Articleinformation about (description of) gsclib045 components?
Is there a document that explains what each cell in gsclib045 does, and how?I can tell (in the most general terms) that something like AND3X8 is an "and" gate, has 3 inputs, and has X8 output...
View ArticleVIVA: Change color/disable highlighting around current (sub-)window
Hi! Is is possible to change the color or disable the red highlighting around the current (sub-)window?For documentation purposes I need to take snapshots like the one below, and would like to get rid...
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