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Adding dummy elements to the layout
Hi,I started my layout design and for the matching purpose, I need to add dummy elements like transistors, resistors. whenever I add an instance as a dummy in the layout the LVS will complain that this...
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Is there any tips & simulator settings to accelerate tran initial converge of...
current status: ams top analog(schematic)&digital(rtl) simulation tran initial converge takes too long >4hoursIs there any tips & simulator settings to accelerate tran initial converge...
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Temperature sweep of a chopped bandgap in MonteCarlo
Hi all,The circuit I'm simulating is a chopped bandgap reference with curvature compensation.I'm interesting in testing the effectiveness of the curvature compensation scheme over a MonteCarlo sweep,...
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Model of Transient Noise Simulation in Cadence
Regarding the transient noise simulation in Cadence, is the generated noise behaved as additive white noise model? In time-domain, is it behaved as normal distribution with one sigma equal to the...
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Save subcircuit instance nets in ADE Assembler
In ADE Explorer (and ADE-L) there is an option to save all voltages or currents within a subcircuit instance ("Outputs -> To be saved -> Select by Subckt Inst"). I can't find this feature in ADE...
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Maestro: Could not find state ..../spectre/active active
Hi,We do have 2 similar maestro views "maestro_lpe" and "maestro_sch". Both view do contain variables and outputs in the users workarea.The user checked in the files in our revision control system...
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Instalation a new component
HelloI am Fritz Antonio and i am starting to use OrCad 16.6. I would like to instal a new component and i have donwloaded its Psice Model from the site of Texas Instriument. How can i instal, i need...
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ADE Assembler - Define IF statement with multiple results arguments (vector)
Hi everyone,Could someone provide some insight how to define a global/design variable in ADE Assembler Maestro in terms of an IF statement, but instead of passing just one value after evaluating the IF...
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Terminal in CDF termOder is invalid (CDL netlist)
Hello all,I'm trying to debug an annoying problem concerning the CDL netlist of a small testbench.In netlister's log I see:WARNING (AUCDL-43): Terminal VDD appearing in CDF termOrder for component :...
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Direct Plot then Transient Signal stop updating after some time
I am running Transient Analysis and usually after running it for some time (not finished yet) I can plot some signals from Direct Plot --> Transient Signal. However, sometimes I get a problem, at...
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Cannot extract spectre transient simulation data using Matlab
I am using a Matlab code to extract Spectre transient simulation data for diode devices. It worked when my tool versions are as follows:mmsim 11.1.ISR20matlab 7.11redhat 6But when I switched over to...
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Sprctre simulation with no schematic cells....
Hi TeamI want to simulate the top level of my IC with the ESD device. However, the ESD devices from the PDK are modeled without schematic views. The available views are auCdl, auLvs, hspiceD, hspiceS,...
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"readns" in DC Corner Simulation
Hello,I have some trouble with DC convergence problem. I add a state-file using "dc-->Options-->readns" and make it converge while I can see the reading procedure in the output Logs. But when I...
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.SPF Pin Annotation Issue in Virtuoso
Hi,I am trying to perform transistor level post layout simulation on a 'P&R'ed digital design. After P&R and timing optimizations, I import the post layout netlist (without physical only cells)...
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Simulation with dspf_include
I'm trying to make a single testbench that will work with schematic or dspf simulations with ADE. When switching from the schematic to dspf the hierarchical delimiter changes from "/" to ".". Reading...
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Changing default editor within ADE
I'd like to be able to use "vim" as my default editor and viewer in ADE. For example, when I view a netlist from a corner. In the past I think I could just setviewer = "/path/vim"editor="/path/vim"in...
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Abstraction Generation Error (IC 6.1.7)
Hi, I hope this question is more relevant to Custom IC forum. I am trying to generate the LEF files from a custom standard cell. Until I reach the abstraction step in the abstract standalone mode,...
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Maestro customization: Not to open schematic in tab, and two other issues
There are some issues we face with maestro and its default settings and we are wondering if those can be customized using ".cdsenv" ot ".cdsinit":1. A maestro view sometimes remains locked after I...
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Differential STB analysis in Explorer
In explorer I dont find the option of using differential STB probes. I had the option in ADE L.
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LM5022 convergence issue
Hello community,I designed a DC/DC Boost converter with the following characteristics:- Vin 30-40 V- Vou 325 V- Iout 0.6 A- switching frequency 200 kHzI am stuck with a convergence issue. I have...
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