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ocean scripting
Hi everyone,If I want to send to a file data from a particular mosfet parameter, say the mosfet current id, I can do: ocnPrint(?output "<path>/<filename.dat>" getData("M0:id"))Now, what if...
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Access design variables from Verilog-A file
Hi,I wonder if there are any way to access design variables in ADEXL from a Verilog-A file during a transient simulation?I am sweeping a design variable in my ADE-XL session and running several...
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QRC with dspf output view: no library cells in the instance section of the...
Hello,I would like to do post-layout simulation of a design that uses standard cells by creating a spice compatible netlist (to be able to use it with ELDO). The problem is that when I use the...
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transistor model - netlist - spectre - matlab
Hi everyone,I have a question regarding netlisting, matlab, spetre and the mosfet model.From what I understand, when we run a simulation using spectre, a netlist is created which will be fed to the...
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MATLAB crashing with SpectreRF Toolbox
Hi, I'm trying to grab the data from my Spectre simulations into MATLAB using the SpectreRF Toolbox. After going through a lot of forum posts and the MatlabAN.pdf document in the toolbox folder, I...
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Binding multiple commands to single bindkey
Hi,I wanted to bind multiple command to single bind key.I m trying hiSetBindKey("Schematic" " R" "hiReszieWindow(hiGetCurrentWindow() list(31:40 1323:938)) schZoomFit(1.0 0.9)")So when i press R first...
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How to stop blinking schematic net when its probed
Hi,When I am probing certain net in Schematic design, it keeps on flashing. Can anyone tell me how to stop it ?Also, is there way to increase thickness of net when its probed ?Than
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Buck Converter Design
Hello,I just started designing Power converters in Cadence Virtuoso. I am trying to implement an Open loop buck converter with the following specifications:Vin - 5VVout - 1.8VFsw - 1MHzIload - 5AL -...
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Regarding verilogA model of a discrete time delay free integrator
Hi,I am trying to implement a delay free integrator with transfer function = 1/(1-Z^-1) using the model writer of the cadence virtuoso the corresponding generated code is mentioned below.Problem: When...
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Requesting any reference to intelligent LVS issue debugging
Hi,I am working on analog circuit design using Cadence Virtuoso. The layout Suite I use is version IC6.1.6-64b.500.8I never had any formal training on layout design. In last two years, I gathered only...
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Injecting a device into an existing net
Hi,I am looking for a way to inject a voltage source (or a resistor etc.) into an existing net. My goal is to manipulate the voltage on the net, e.g. changing the threshold voltage of a MOSFET by...
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root raised cosine filter
hican any one guide where can i get the help documentation for "root raised cosine" filter setting and parameters (rflib >> root raised cosine filter). OR any other resource that may help to...
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Annotate Transistor operating points
Hi,I would like to annotate the operating points of my transistors (ADE L-> Results -> Annotate -> DC Operating Points). The annotations are always the same: Id Gm_M1 Gds_M1 Gmoverid_M1...
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Pins are not annotated using subcircuit (netlist)
Hi all.I'm following the procedure depicted on https://community.cadence.com/cadence_blogs_8/b/rf/archive/2009/01/07/tip-of-the-week-how-to-simulate-a-subcircuit-netlist-with-spectre-in-ade My subckt...
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Dummy back annotation problem
Hi,I did the following:I used the Layout XL "Generate all from source" feature to generate a layout from my schematic. The schematic i used, though did contain instances which did not have layout...
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Some flow probes values can not be printed
I have a mixed signal design in which I want to probe the current of several supply/gnd connections within the toplevel design.I encounter the problem that from a number of submodules I cannot print...
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auCdl based netlisting
Hi,I am under the process of migrating my design from an older PDK version to a newer version. In the older version, whenever I used to export my schematic to netlist via the export tool, at the end of...
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Cadence 6.1.7 on CentOS 7
Hello, I have installed Cadence 617 that runs from a RHEL server 5.6, when I try to launch virtuoso I receive the following message. Make sure that cdsGetOABinPath is part of the Cadence...
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HOW TO configure the license of the PDK Automation System(PAS) in windows
hi, I used to use PAS in linux and I know how to set the envoronment varibles on linux. now I have install the PAS in windows but didn't know how to set up the lic envoronment varibles and start up...
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Issues with vector stimulus and spectre
Hi,Yesterday a friend told me about the VEC file option for spectre. It looks great! But now I spent many hours to get a simple shift register to work but I get unreliable results. Sometimes it works,...
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