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Printing all DC operating points of all devices
Hi,I am a beginner in ocean. I have the following ocean script which reports the source current of transistor...
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Make a copy of the Kit
Hello,I am working on a project where I need to add some custom layers for layout. In order not to mess with the original Kit, I want to make a copy of it and do all the modifications to that copy...
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Can i make the design rule check blind to a specific layer?
I am incorporating a device (memrsitor) in my layout that is not defined in the kit. I was thinking of representing the device by a layer that is not used in my design. However, this layer will have...
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Continuous Path/Routing with Varying Width
Hello,I am using version IC6.1.6-64b.500.11.In layout editor, I would like to create a continuous (metal) routing (or path) which consists of pieces with different width. When I create a routing by...
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viewing spectre simulation results right from the start
Hi to everyone!We're looking for a solution for an apparently simple problem. When starting a simulation with spectre, we want to look into the results right from the beginning. We want to do this to...
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ADE XL and virtuoso -nograph not working
On trying to run any simulation in ADEXL I am getting ADEXL 1921 error (failed to start job after 3 attempts. Possible reasons could be ........).Also on trying to execute virtuoso -nograph I am...
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Developing custom SPICE compatible transistor model
I am trying to develop a simple transistor model in which I could just vary drain-source and gate-source voltage and calculate the drain current. I have drain current equation as well as the parameters...
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Problem with simulating a PVS ERC spice netlist in spectre plus a skill for...
Hello forums,1) I have an age old problem that I know not how to resolve. I have a layout and I created the spice netlist from it using PVS ERC. I cleaned up the resulting netlist (by removing the...
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Wrong current value through behavioral source in custom SPICE model
Hello, I created a symbol in Virtuoso 6.16 and wrote a SPICE model for it and added spectre stop view in cell view. Now when I try to simulate (MMSIM 13) it I don't get any error but the current...
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Cadence DRC Environment vars
I want to run DRC a a specific cell. first, I used to run it as: IBMPDK-> checking > calibre DRC and a form would pop up where I can define my BEOL_stack. Now I am running on a copy of the kit...
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Changing the I/O Type of a Pin in Layout View Using SKILL
Hello, I am using version IC6.1.6-64b.500.11.I am creating a layout with some SKILL instructions. I would like to add a pin by defining some parameters like terminal name, I/O type etc. From what I...
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How and where to find Model card used in simulation
HiI am using IC6.1.6-64b.500.8, Virtuoso ADEL and ADEXL. I am using a technology file from Taiwan Semicon...' and standard VT devices in my circuit.When I see the Model file (tech.scs) it has many...
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custom VCCS
Dear allI want to design a vccs to implement this function:I(y)<+ tanh(V(x));I have done that using a verilogA model and I connect it in the cadence circuit which is as in the attached file, the...
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A few questions regarding using PSS for rectifier design
Dear all,I'm using PSS for rectifier simulation and try to look at the voltage and currents in steady state. I'm trying to improve the accuracy of the PSS and try to get the same results as in the...
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How to prevent automatically opening spectre.out in ViewFile-Window when...
Hi,I am using ICADV12.2 ADE Assembler. Every time I run a simulation, a ViewFile-Window opens showing the spectre.out file. How can I prevent this? I do not want to show this file every time I run a...
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Extracted simulation not working properly - netlist problem...?
Hello everyone,PROBLEM EXPLANATIONI am facing a strange problem. First of all, I am using ICFB (a very old version).I have a very simple cell made of 4 transistor. This cell has a schematic view, a...
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DEFT
I want to use the DEFT feature in Cadence. I went to tool>technology file manager> and then this little form showed up that has things like dump....etc. There should be DEFT under the edit...
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Performing Parasitic Extraction on a Layout which Contains an ADS Momentum Cell
Hello, Firstly, I use the following versions of the tools:IC6.1.6-64b.500.11Calibre nmLVS 2016.2_39.29Calibre Quantus QRCADS 2012.08 My goal is to perform RC extraction on a layout (let’s say myLayout)...
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Setting up a jitter simulation
Hi,I do not quite understand how the pss/pnoise jitter simulation works and if it is the right tool in the first place.I generate a clock with a bunch of logic gates and flip flops and would like to...
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Sweeping 2 variables (at a time) in Parametric analysis
hiI have a question regarding parametric analysis. I want to sweep two variables (in parallel) to find some optimum value. but i am facing the problem that it sweeps one variable while fixing the...
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