Hi all.
I'm following the procedure depicted on https://community.cadence.com/cadence_blogs_8/b/rf/archive/2009/01/07/tip-of-the-week-how-to-simulate-a-subcircuit-netlist-with-spectre-in-ade
My subckt declaration on the netlist matches with the pins on the symbol.
subckt adc_sh_comparator DVDD VDDA1 VDDA2 VSS VSSA1 \
VSSA2 cfg_cmp_i\(7\) cfg_cmp_i\(6\) cfg_cmp_i\(5\) cfg_cmp_i\(4\) \
cfg_cmp_i\(3\) cfg_cmp_i\(2\) cfg_cmp_i\(1\) cfg_cmp_i\(0\) \
cmp_3v3_o en_i isnk0_i isnk1_i isnk2_i isnk_pa1_i isnk_pa2_i \
isnk_pa3_i isrc_pa1_o isrc_pa2_o isrc_pa3_o track_i vdac_i vin_i \
vout_db_o vout_o vrefp_i
I tried the procedure with another schematic and it worked.
So I suspected that I have to clean or redefine some pin order.
Thanks in advance