LVS error while connecting bulk with source
Hi,I am drawing the layout of a schematic. Here for certain PMOS the bulk is connected to the source and both together connected to the voltage source. Now in the layout, I have drawn two voltage...
View Articleprobe different point on power nets in av_extracted view
Hi,In my design there are multiple hierarchy and i have done the av_extraction at the top level now i want to power net at the lowest level but i am not able to do so can you pls guide me on how to do...
View ArticleSpectrum assistant for FFT - How is the signal freq decided?
Hi,How does the Spectrum assistant tool for FFT in ViVA decide on the signal freq for computing the SNR, etc. values?Like, the input transient wave might have multiple frequency peaks, and I might be...
View Articlepower drop not seen in av_extracted simulation
Hi,I did simulation with ultrasim on av_extracted netlist for my design. but i see that each point in the Power supply there is an ideal voltage present (no droop in the voltage)I am facing an issue in...
View ArticleCoupling vs. Decoupling Extraction vs. Silicon Results
Hi all.I'm simulating an extracted view for a R-DAC. On my simulations results I'm seeing differences on DAC settling time between coupling and decoupling cases up to 20ns. What would be the...
View ArticleWarning message about OS compatibility while invoking virtuoso
Hey,I am facing some warning message unexpectedly while I was invoking virtuoso.When I searched about this warning in the forum, it was saying about OS compatibility issue. I am using compatible OS...
View ArticleWhen to Use TopMetal2
Hi,I am using a new process that contains both TopMetal1 and TopMetal2. Unfortunately documentation is not very useful on when to use either one. Wondered if anyone had any advice on the following:1....
View ArticleModifying a string passed through pPar()
I've got a couple of s-parameter files that I want to make symbols for so I can easily use them in my schematics. For that, I made a symbol (let's call it sparblock), and a schematic view that contains...
View Articleproblem when launching virtuoso IC 6.1.5 on rhel 6.8
Hello I get the following errors when trying to launch virtuoso on rhel 6. thanksawk: error while loading shared libraries: libdl.so.2: cannot open shared object file: No such file or directorysort:...
View ArticleProcess Design Kit (PDK) Development for particular technology
Hello,I have recently started to develop PDK for our own technology, It is currently in research phase and we do not have much information about technology parameters. My task is to develop PDK. I know...
View ArticleADE-L generates .grf files with non-existing expression definitions
Hi! I'm having an annoying issue with some states in ADE-L. For some reason, some old expression definitions are being held somehow somewhere (even if they don't exist at all in the outputs list), and...
View ArticleChanging the FET model parameters dynamically during Transient Simulation
For example, I have some .scs file which has the following some generic model:section typparameters...+ mainfet_rdsw = 5000...endsection typNow in the above model, lets say at some point of time during...
View ArticleNoise contribution of an instance
Hello,Is there a way to get Spectre to output total noise contributed by a certain instance? The instance may be a sub-circuit, in which case I'd like to know the sum of all contributions from...
View ArticleUse the spectre relay component
Hi,analogLib has a cell called "switch" which has 5 parameters, open voltage, closed voltage, open switch resistance, close switch resistance and multiplier. the documentation says that the spectre...
View ArticleHow to draw the bottom level instance layers in the present level
Hi,I am writing a program to get the overlapping area of the different layers. I wrote for the layers present in the heirarchy level successfully. But the problem is when there is an instance, for...
View ArticleHow to measure current probed by isub() command using spectre xps ?
Hello All,I am trying to find leakage of different instances/subckts using spectre xps.I tried using chk1 dyn_subcktpwr inst=[*] port=[*] depth=4 time_window=[36n 37n]It dumped an...
View Articlelinear fit of simulation results
In ADE I extract some parameters from a waveform (time elapsed from rising to falling edge on some kind of TOT) on a parametric simulation. I plot the result but I would like to get a linear fit of...
View ArticleTemperature Evaluation
Hello friends from Cadence,We have schematic and layout views.We want to evaluate the temperature propagation in different parts from chip (in layout and/or schematic level).Could you inform us the...
View ArticleReferencing a model, not a model instance
Hello,I found the post about disabling flicker noise with alter in this forum and I got it working:turnOffFlicker1 alter mod=N15.xmmaster.lvtnfetacc param=nfalw value=0turnOffFlicker2 alter...
View ArticleNonlinearity Separation
This is with 95% a question without solution but I still try it .. maybe there is something out there.For noise the different sources are visible in the results browser and noise summary so I can...
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