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ADE L netlister to stop at cell name match rather than view name match

Hi,I have a design with standard cell. For the standard cells I only have layout and symbol. When I try the ADE XL netlister, it could not descend into these standard cell since there is no schematic...

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memristors

Hi,I am Bindu. I am a beginner in cadence. please suggest the tools required to design memristor crossbar architecture in cadence. And how to purchase them thier system configurations etc.Please help...

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failure with using amsd block

Hi AllI am trying out to use amsd block to configure some cells to be bound to a spice netlist.inside the amscf.scs file, I am writing some thing like:include "analog_top.scs"...

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Howto run Cadence testbench examples in ./tools/dfII/samples/artist

Hi,I do not understand how I can run the examples provided by cadence in the path  ./tools/dfII/samples/artist.Especially I am interested in the pllMMLib testbenches. I already found a tutorial on...

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QRC .rcx_setup.tpl file

Is QRC Template file (QRC .rcx_setup.tpl) created by QRC run or this file is a part of a PDK and QRC use it for the run?

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Mark-net usage

HI, I have a large layout and I need to see for example the net name A all the way from M5 to M1. However, when I use connectivity->net->mark the tool highline every thing include any nets which...

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alter option

Hello,Before running my transient simulations, I want to change the multiplicity factor of some blocks. ( I am using  spectre / spectreXps )I use the command lines below. Does the simulator change the...

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Generate SDF for custom digital layout

Hi,I want to know what is the procedure that I have to follow in order to generate an SDF file from a custom digital layout I made using Virtuoso.I have the Verilog of the standard cells I used (Clock...

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is there any way that we can run lvs with schematic in OA virtuoso version...

HI All,I have a data base in icfb 5.1.0 and we want to convert it to virtuoso version 6.1.6-64b. First we convert the schematics and symbols from icfb 5.1.0 to virtuoso 6.1.6-64b then we want to run...

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Problem with Calculator in ADE - Not showing

Hello Everyone,I am using Cadence Virtuoso through a server (using Putty and Xming), on a Windows 10 laptop.Everything was working fine and suddenly when I tried to open the Calculator, the windows is...

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how to sweep an equation which is formed using variables?

HiI created an inverter with pmos and nmos and declared their widths as variables (Wp, Wn) by keeping the lengths constant. Now I want to plot VOUT vs  VIN  for different values of Wp/Wn ratio instead...

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gm vs id plot for MOS transistor

I want to plot gm (y-axis) vs id (x-axis) for a transistor. Google search shows me how to plot gm/id vs vgs or gm vs vgs but not the gm vs id, i. e., the value of gm sweeping id. Can anyone help me to...

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Measure power consumption on CMOS and resistor?

Hi everyone,I have a circuit include 1 cmos and 1 resistor. I want to measure power consumption on each device.Can you help me how to measure it?Thank you. Have a nice day.

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access signals through hierarchy in schematic

hello experts,this is just for testing bench purpose, how can I use signals across hirarchy w/o I/O ports, e.g., I want to see BlockA/BlockSub/signalB somewhere else?thanks,David

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IC617 output table

Hi Team, I am using IC 617 for transient simulation. After the simulation, I can plot the output waveform. However, my desired form of output would be in a table format.Moreover, for instance, I want...

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Printing to a file using fprintf

Hi,I have a simulation for generating MOS transistor data using a 4 nested sweeps (VGS, L, VDS, VSB) for a 4-terminal NMOS device. I am able to setup the simulation and run it with all working OK....

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How to change routing configuration in Power Routing Options form in Virtuoso XL

I'm using Virtuoso 617. I am trying Route->Power Routing  feature . The Power Routing Options GUI form (with Block Ring tapis choosen ) is pre-defined with "Horizontal Routing Layer" = "M1 M3 M5 M7"...

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Evaluate expression only after all parametric simulations are finished

I'm using ADE Assembler (IC6.1.7-64b.500.17).I have a parameterized desgin variable. I have an expression for the noise and for a certain current. The noise and currents are both calculated/evaluated...

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AMS simulation on a synthesized netlists --- NO sim result

Hi there!I am trying to run ams simulation for a big design mixed of digital and analog. However, the output of simulation for the digial block is always tied to zero and basically there is no...

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ADE-XL - How to make use of licenses more efficient?

Hi,I am simulating hundreds of corners for more than 10 tests on ADE-XL and I need to optimize the use of licenses as much as possible.When running tests sequentially in series, all my licenses are...

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