Only part of transient time displayed.
Hello,I have a similar transient time displayed issue as reported in https://community.cadence.com/cadence_technology_forums/f/38/t/22201From spectre.out, the simulation is completed successfully at...
View ArticleCorner Simulations of Multiple Test with dependent variables in ADE-XL
I am using ADE-xl to run three separate tests to simulation my bandgap circuit. One for slope trim, the second for absolute trim, the third for a temp sweep with the proper trim values. I am able to...
View ArticleUnbound pins when running Assura LVS in Virtuoso Layout Suite L
Hi,I am getting unbound pin errors when running Assura LVS in a layout manually done in Virtuoso Layout Suite L. It seems that Assura LVS is not extracting the pins, which are done in the MET PIn layer...
View ArticleAccess simulation data with OCEAN command getResult() / method description of...
Hello,I would like to iterate through my dcOpInfo results to check automatically for every bsim3v3 instance the region parameter (as an example).I found the OCEAN report() function. But it does not...
View ArticleExporting ADE-L Variables
Dear all,I have an ADE-L session which has some variables defined and I would like to export them so they could be used in a script (tcl script). Is there a simple way of doing it ?Best...
View Articlestb and tran analysis discrepancy
I'm having trouble understanding the results of a stb simulation I'm running over process corners and temperature for a basic switched capacitor active integrator. There is a low frequency pole due to...
View ArticleWhat is license feature "Virtuoso_Spectre_GXL_MMSIM_Lk", and how to use it?
Hi there! Checking the license usage at my site (lmstat output) I find situations like the following for the spectre licenses:Virtuoso_Multi_mode_Simulation licenses: 180 used: 159 free:...
View ArticleUsing DC operating point calculated from spectre in APS Simualtion over Corners
Hi all.I have found that Spectre has a better convergence on DC analysis for my specific case. So I'm planning to use DC information from Spectre and then pass it to APS simulator which has better...
View Articleunwanted snapping in layout editor
Hello,I am using Virtuoso 6.1.6-64b.When I draw a 10 um path with metal layer on the vertical direction, then I want to draw another thinner path on it with the same metal layer in the horizontal...
View ArticleExport simulation results from Virstuoso 6.1.6
Hi,I am a newbie in Virtuoso. I have bulk of simulation data which I want to export from Analysis. Individual file handling is too much time consuming. Is there any work around?!I do not have Virtuoso...
View ArticleVerilog-A, one time execution function
Hi, I am developing a verilog-A model for a device. I want to write a function that is executed only one time in the simulation during the device first transition from high resistive state to a low...
View ArticleShould I use the PIN or the NET layer for gnd?
Hi,I have a layout of a simple PMOS transistor passing DRC, LVS and QRC by using the PIN layer MET1 purpose for the 4 terminals and the connection for the general p-substrate...
View ArticleMeasure DNL/INL in ADE-XL
Hi, I am trying to characterize a DAC design and I need to measure these parameters for my design. The way I'm doing it is by sweeping all the input digital codes in a transient simulation. I can use...
View ArticleProblem in importing verilog netlist to cadence
Hi,I am using IC6.1.6 and trying to import verilog power netlist to virtuoso.I am using File--> Import--> Verilog. My reference library contains digital cells which have pin definitions like...
View ArticleHow to traverse PSF simulation results programmatically with SKILL/OCEAN
Hello,I have the following use case:- I have a DC simulation with saved operation points in the PSF format in some directory.- I would like to load the results, traverse the design hierarchy and print...
View Articledft error with a valid transient waveform
Hello,I want to calculate the dft of a transient waveform.Thought vtime('tran "/out") is a valid waveform (it can be plotted with no error), I get the following error message:*WARNING* yvector wrong...
View ArticleRE: ADEXL parametric simulation scalar plot
Hi All, I am using IC6.1.6 version of virtuoso. I want to do a parametric analysis for a scalar value versus temperature. I can do it easily for one corner in ADEL that the scalar varialbe is...
View Articlevarying inline subckt parameter with altergroup in Spectre
I am trying to vary the inline subckt parameter as :inline subckt n1 (d g s b)parameters ad=0n1 (d g s b) n1 ad=admodel n1 bsim3v3 ends n1a1 altergroup { model n1 bsim3v3 ad=1}But getting the...
View ArticleLayout Netlist and Topcell Netlist shows correct connections but LVS does not...
Hi,I am generating the topcel netlist from schematic and layout netlist from layout. I have checked both of them. Topcell netlist has an "X" before each component name which I should eliminate them...
View Article