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Regarding accumulated long term jitter sim using PSS/PNOISE

Reference:  https://community.cadence.com/cadence_technology_forums/f/33/p/21569/1350850#1350850I am posting my reply/concern/question  to the above mentioned reference as I am not sure if I will get...

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Tracing net through few metal layers.

Hi,Lets say I have 10 metal process. I want to trace certain net from metal 5 to metal 8.  How do I use MarkNet Options, like what should be selected in Via layers, Connected layer, Stop layer ? I was...

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Loading Default setting in cds initalization

Every time, I want to launch virtuoso cadence, I source my settings by typing the following command in my terminal: source /apps/settingsThen virtuosoHow do I be able to load my default settings in my...

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can AEL(analog Expression Language) evaluate strings?

I am doing an analog simulation with spectre and want to change 2 voltage sources (A,B)  with a simple parameter. My voltage sources are pwl type and need a file as input.I have lets say 3 states...

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Layout Make readonly/Review Request

Hi Andrew, Usually in layout teams there will many users and most of the cases layout cells will be locked by many users. One user need to ask another user "to make read only" by orally, email or...

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integrate ansys Electromagnetic Suite 16 problem

hello, guys    I am trying to integrate ansys Electromagnetic Suite 16 into cadence. I have installed Ansys Electromagnetic Suite 16 and the ECAD (which is the interface to the virtuoso)  and do...

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How to add additional parameters to annotate OP-point defaults - IC617

Hello All,Is there a way to append the list of default CDF annotate parameters across a library.I'm aware of how to perform this action element wise, but its a pain to to this every timeI invoke a new...

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Creating a symbol from a .scs file

I have a veriglog A model for a device. Earlier, I used to create a symbol from the verilogA model directly and all values preceded by "parameter" in the code would show directly in the CDF list of the...

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Using alter parameter to set dependent analysis variables on the same ADE-L...

Hi all.I want to use through GUI interface the alter parameter to set dependent analysis variables on the same ADE-L test bench. This approach would allow the use of the same test bench for different...

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Manufacturing grid/ Routing grid

Hi!Is there any way to customize the values for these 2 grids? I understand they are currently read from the tech file and I do not want to touch that.I have found some answers related to creating a...

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Plotting Waveforms in ADEXL Generated from Monte Carlo Sampling

Hi All,I am using Cadence Virtuoso version IC6.1.6-64b.500.6, and spectre version 14.1.0.896.isr16. In ADEXL I am trying to run a DC test in spectre across MC and superimpose all of the plots to see...

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ERROR (ADE-3036): Errors encountered during simulation. The simulator run log...

I have just installed IC616, INCISIVE151,MMSIM151, and other tools. but while running a simple inverter transient analysis, i am getting following errors. kindly let me know the possible reasons and...

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Short Violations in Encounter

After doing placement and trial route in Encounter, I get over 1000 "short violations". The violations are all concentrated within the small left corner of my design. The violations are between...

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Loading Default setting in cds initalization

Every time, I want to launch virtuoso cadence, I source my settings by typing the following command in my terminal: source /apps/settingsThen virtuosoHow do I be able to load my default settings in my...

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ADE: Use of nested design variables in output expressions

Hello,I have defined the following design variables: (for sake of clarity I use the OCEAN syntax)desVar(      "fin" 400M    )desVar(      "Tin" "(1/VAR(\"fin\"))"    )desVar(      "simTime"...

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TO select all mosaics in visible area

Hi All,I want to select all mosaics in a visible area of layout window. Some part of mosaic may be out side of visible area. I want to select all these.Please let me know is there any way to do...

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Constraining input signal in Encounter

I have a serial-to-parallel converter based on a shift register  and a bank of flip-flops that latches the data out. I synthesized this in dc_shell and p+r in Encounter.  My timing constraint file is...

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Layout Make readonly/Review Request

Hi Andrew, Usually in layout teams there will many users and most of the cases layout cells will be locked by many users. One user need to ask another user "to make read only" by orally, email or...

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Marking nets in cadence showing shorts

HI ,When I am trying to mark nets in cadence to verify routing i am am seeing shorts. Cadence version is IC6.1.7-64b-500.7 . Marking the nets is also highlighting other unconnected nets, but LVS is...

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DC convergence problem

Hi all,I am having some dc convergence problems. I would like to ask what's the best way to overcome those convergences problems?I have got some ideas. I could set a node voltage (the one that is...

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