Is there a simple way of converting a schematic to an s-parameter model?
Before I ask this, I am aware that I can output an s-parameter file from an SP analysis.I'm wondering if there is a simple way of creating an s-parameter model of a component.As an example, if I have...
View Articlencsim: *E,FLTIGF: [FLT] Failed to inject fault at NET
Hi,I'm doing fault injection with ncsim and got stuck at the following message: "ncsim: *E,FLTIGF: [FLT] Failed to inject fault at circuit_tb.U0.n2174." I already tried with other NETs, with SET, SA0,...
View ArticleStability analysis Phase margin and loop gain
Hi,I am designing a resistive feedback TIA which needs a capacitor in its feedback loop for stability.I would like to know the effect of a feedback capacitor on the phase margin to determine the...
View ArticleChoosing XF Magnitude of supply when measuring supply noise
I have read many pages on using pxf to measure supply noise, and I know to divide the output by the slope of the crossing point get the jitter transfer functionMy question is, if the output of a pxf...
View ArticleExplanation for sampled PXF analysis
I am trying to put together for myself why dividing a sampled PXF analysis by the slope of the signal translates into jitter.I understand the units makes sense ([V/V]/[V/S]=[S/V]), but conceptually, i...
View ArticleWhat is the range and type of number that spectre m factor can legally take?
I.e., all natural numbers? Positive real numbers? Can it get negative numbers?I could not find an answer to that.When applying to transistors, I'd expect that m can only be a natural number. However,...
View ArticleVMT
Hello All, I am trying to launch virtuoso with the vsdp option in IC 6.1.7-64b.500.23 I am getting the below error. Can you please advise what is the issue here ?$ virtuoso -sdp[1] 76377-sdp: Command...
View ArticleGlobal variable sweep in Monte carlo analysis
Hi All, I am trying to run MC (Monte carlo ) simulation on a design. I am unable to sweep a Global variable in MC simulation unlike corner analysis. Can anyone please suggest a way to perform MC...
View ArticleAssura and Quantus options
Hi All, can anyone please let me know what is the difference between running Quantus QRC from Assura menu as compared to the Quantus menu ?Any details will be great help. thanks
View ArticleMark Net in Virtuoso-L
Hi all,I have troubles using the Mark net tool, maybe you could help out.In this example for the test I try to highlight a simple net (that does not propagates too much in the layout) called "pwr_i",...
View ArticlerfTlineLib sbend
Hello,I'm modeling a PCB trace using rfTlineLib components, and wanted to clarify a couple things about "sbend" discontinuity in particular.1. Documentation for this component in Cadence does not...
View ArticlePower grid design Innovus
Hi, Given the power consumption of a design, how can we go about designing the power grid for the design in Innovus? Is there a method to compute the minimum width for the rings and stripes, via nos,...
View ArticleUnable to Import .v files with `define using "Cadence Verilog In" tool
Hello,I am trying to import multiple verilog modules defined in a single file with "`define" directive in the top using Verilog In. The code below is an example of what my file contains.When I use the...
View Articleprobe tcl command with time_window option
Hi,I'm running AMS simulation and using probe.tcl file to save the waveform. The size of output file is really big so I need to have an option of only save the waveform during a window of simulation...
View ArticleDC SWEEP COMPONENT VARIABLE
I have a ring oscillator CMOS that i would like to sweep the values of transistor's width, lets say, from 500n to 10u, and i would like to plot the frequecy of that oscillator x width, opening the...
View ArticleIs there a setting to let multiple runs of transient noise run in parallel
The version IC6.1.8-64b.500.4I am running transient noise and I specified 10 runs. From the output log file, I see that the 1st run takes a seed of 1 and the 2nd run takes a seed of 2. What surprises...
View ArticleComputing logarithm in simulator
I am attempting to convert a voltage to dB in the simulation itself. First thought was to create a verilogA block like this:`include "constants.vams"`include "disciplines.vams"module dB20(vi, vo);input...
View ArticleHow to convert pnoise to time domain process
The circuit is oscillator, so I am dealing with voltage noise not jitter.I want to get the time domain representation of the noise but the transient noise analysis takes ways too long to simulate....
View ArticleCadence License Server Host Id
Hi All, can anyone please let me know how can i check Cadence License Server Host Id ?thanks
View ArticleRegarding Monte-Carlo Simulations
Hi,I have implemented a Common Source amplifier with current load. After simulating gain, now I want to go for Monte-Carlo Simulations for knowing statistical parameters. I have few questions?1. What...
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