I am attempting to convert a voltage to dB in the simulation itself. First thought was to create a verilogA block like this:
`include "constants.vams"
`include "disciplines.vams"
module dB20(vi, vo);
input vi;
output vo;
electrical vi;
electrical vo;
analog begin
V(vo) <+ 20*log(abs(V(vi)));
end
endmodule
This seems to work OK for a transient simulations, but in AC sim the output is totally wrong (should be 0, but is 173700 instead).
Am I doing something wrong here? If this won't work, is there another way of doing this, like a clever arrangement of analogLib components?
Thanks,
Steven