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Plot analog bus with non-overlayed traces in ViVa
Hi,I do have an analog bus "vout<31:0>" and a output expression "VT("/vout<31:0>")", and I want to plot the transient signals.In ViVa it plots all signals on top of each other...
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Graph symbols
When you get a graph from ADE L in virtuoso, when you right-click and add a symbol to the graph (x,o,+..) is it possible to increase the size of the graph symbol? As I am trying to make them clear in...
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Resistive-capacitive OTA bandpass filter for low frequency signal acquisition
How should I give the DC average value(VCM) to the input to a fully differential OTA when I am using it in a loop where capacitive input is needed? My signal is a sinusoidal signal with frequency...
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how to calculate avg power
I need to calculate average power in transient analysis using cadence tool, but in tran option i am not getting pwr signal. what is the problem behind that??
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To get the PM and GM from stb analysis for a parameter sweep
I have a basic opamp with input capacitance (Cin), feedback capacitance (Cf) and feedback resistance (Rf). Initially I did a stability analysis (stb) with fixed values for all the design variables...
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What is the latest version of MMSIM release?
Hi All,What is the latest version of MMSIM release?Because I can not find MMSIM to download in this website:downloads.cadence.com/.../Welcome.eoBest regards,MarbenBest regards,Marben
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Transistors Operating Region check in Ocean Script
Hi,I am trying to optimize my design using cadence ocean script to print a results on text file and then I am using Matlab for post processing this results and do iterations. The first criteria I have...
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Import/exporting from cadence calculator
Dear All,Is there a way to export and import back the equations from cadence calculator or the list of ADE L outputs?Thanks in advance
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Using one expression value to get another expression in ADE-L
Hi,I have a simple opamp integrator, with input and feedback capacitance (Cin and Cf). I have 2 expressions fot getting settling error voltage at output net and input net.Settling error(Vin) -...
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Force minimum 2 Vias whenever creating Via in Layout View
Dear all,I would like to ask is there any way to force minimum 2 Vias when creating Via in Layout View? In setting cdsenv or SKILL script...There are some scenarios like: creating bus, creating single...
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Using calcVal() function in ADE Explorer is possible?
Hi all.I would like to know if calVal() function is supported in ADE Explorer and if yes, how it can be possible?Due ADE Explorer has an unique test bench, I have doubt of it.Thanks
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Ocean: exporting internal circuit signals taking more than 1h
The following working code saves the voltage of all signals from a circuit in a text file:I0.U94.net0158 0.999999 ADDR_OUT\<0\> -3.61176e-07 ADDR_OUT\<1\> -3.68596e-07 ADDR_OUT\<2\>...
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Two part functional symbol in Virtuoso
Hi,Does Virtuoso have method to support two part symbols? An example would be a relay with a switch and control symbol that is separated but bound to one functional model. This is supported in Allegro...
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VHDL-AMS delayed attribute
Dear all,I am currently trying to model a simple delay in VHDL-AMS.entity DELAY is port( terminal vin : electrical; terminal vout : electrical );end DELAY;architecture behavioral of DELAY is...
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Simulation output results showing different names for the Expression used to...
Hi,I have some expressions (fig1) that calculates some results. I am running a parametric simulation for a parameter Ron. In the plots after the simulation, The name labels for each expression looks...
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How we can use the single VCVS file containing N waveforms for generating the...
Dear All,I thought to create a new thread for this post instead of adding to an old but related thread.We can save N voltage waveforms in a vcvs file by using the thread...
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Define libraries as read-only
Hi,is there a way in cds.lib to define libraries as "read-only" ?I do have libs defined in cds.lib from another project, which I want to have read-only.I do not want to set permissions via the Linux...
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Pole Zero location from stb Analysis
Hi,I am running a Stability analysis ('stb').Can I see the exact pole zero location from this analysis without doing the 'pz' analysis?
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mosfet model spice/pspice
I am simulating a discrete mos device in Spectre.If I treat it as a spice model the drain-source current is much too low (mA vs amps expected). If I treat it as a pspice model it is good. The model is...
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Building up array of instances
Hi,I wanted to build up an ADC array with different inputs and output in schematic editor. Is there a way to do this efficiently instead of copying, for example, 64 times the instance? One could use...
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