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ADE L psf dcOpIno MOS data is scalar but XL psf is wave
When using oppoints from ADE L psf the data is scalar but the same as a Test in XL gives data that is wave at design point 0 even if no sweep specified.. You have to use the data at value(0). Also...
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Incorrect waveforms when using Spectre XPS
Hello,I'm simulating an old processor to test Spectre XPS. When I simulate with Spectre only or Spectre APS++ the results are fine, however, when I simulate with Spectre XPS the resulting waveforms...
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Virtuoso continues to crash
Hi,I have a colleague who keeps having issues with virtuoso unexpectedly crashing whenever she tries to open a layout in either read or edit mode. Some cells are fine, but there are some that crash...
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Problem in monte carlo simulation from ocean
Hi,I am trying to run monte carlo simulation from ocean but I am struggling a bit with monteExpr(). I am using IC 6.1.7. My ultimate goal is to do trim montecarlo simulation . How can I do calculation...
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spectre save restart
hi,AEI want to restart a tran simulation base on another tran simulation. In the first tran simulation, I have set the savetime and savefile but I don‘t know how to restart the second simulation basse...
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'E' type signals not exported in ocean
Hello,I'm exporting the signals of a subckt with Ocean, however, some signals are ignored. The three signals in the image bellow market as "E" are ignored. What does "E" stand for? I couldn't find it...
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ADE XL: chosen instances ignored in statistical corners
Hi! I'm trying to create statistical corners for a Monte Carlo simulation where I only consider variations on a couple of instances. The Monte Carlo run goes fine and only includes mismatch from the...
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Precise Vth extraction of MOS
Dear all,I am extracting Vth vs L plots using the DC OP "vth", which represents the value given by the BSIM4 model. However, I understand that fabs normally use the constant-current method to extract...
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HV MOSFET operating region = 4
Hello,I ran a basic dc op simulation on a 60V NMOS. The drain of the device is at 49V, gate =3V, source = 2.3V and it is running 250nA current. When, I print the dc operating point of the device, it...
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spectre cdl
hi,AECan I do a simulation with the cdl netlist? I don't want to spice in the cdl to schematic.Thanks!best regards,nnlt.
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Options for spectreFormatter class when running batch si netlister
Hello, I am trying to find additional options for the spectreFormatter that can be specified from si.env file to modify the output.Currently the main thing that I am looking for is the ability to...
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Where do I modify sheet resistance values for layout when running Assura LVS ?
My layout was created using a PDK. I'm running Assura LVS and seeing parameter mismatches. I'd like to modify the sheet resistance for various layers (hi-res, poly resistor etc.) of my layout design...
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ADE error when I try to load *.VCD file
Hi , i simvision to dump out a *.vcd file and try to use that *.vcd file as an input to my ADE/spectre simulation. I have 2 files rowdecode.vcd which dumped about by simvisionrowdecode.vcd_infor I...
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save and restart in ams simulator
Dear Andrew,I used the save and restart options in the ams simulator. I have set the snapshot and save times in the first simulation, in this simulation I set the stop time to 1.5ms and the supply...
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Incorrect netlist of a circuit containing multibit instances from the...
It happens that simulations cannot start because of errors found by spectre in 'multibit_pcell' during hierarchy flattening. The typical error message reads: ERROR (SFE-1997): "input.scs" line#:...
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The checks/Asserts in the ADE XL
Dear Andrew,I use the checks/asserts function in the ade xl to do the static HighZ Node Chenk, if I choose the Spectre in the simulaiton performance mode the violations in the results are 0, if I...
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XPS ms for help
hello everyoneWhen I simulated PLL, aps simulation could converge, but when I put ++aps on the hook, vco did not vibrate.Meanwhile, if XPS ms is used, the following error occurs:Internal error found in...
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Configure VHDL design for simulation using VHDL Tool Box
Hello,In my simple setup I proceeded as follows:Created cell block_A (clock stimuli)Created symbol view for block_A In Symbol Editor ... "Create CellView from CellView", then select VHDL... cellview...
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Setup text editor for Library Manager
Hello,How to setup "normal" text editor (e.g. gedit or emacs) for Library Manager.Thanks.
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Error while trying to simulate simple VHDL testbench using ams simulator
Hello,The setup is the same as described in my previous topic:block_A - VHDL stimuleblock_B - some VHDL combinatorial logicblock_C - schematic where block_A and block_B are connectedWhen I run this...
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