BinkKey to "Direct plot transient signal"
I want to replace operation of RMB-DirectPlot-Transient Signal in schematic, is there any bindkey available ? Thanks.
View ArticleSimulating standard cells to calculate energy on a cell level
Hello.I have a bunch of standard cell libraries (design packages) from some IP vendors, and I want to compare my own standard cells with them in terms of energy efficiency.The problem I face is that...
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How to calculate the recovery time of a waveform, using the calculator?
Hello,I'm using Virtuoso ICADVM 20.1and I'm trying to calculate the recovery time of a voltage regulator from VCC (5 V) to VCC-1 (4V). In normal condition, the output voltage is around 4 V; at a...
View ArticleHow can I used statistical results, e.g., mean, standard deviation, from...
Hello,So, I would like to have something like call("standard_deviation" "previous_test")and then put this expression in the design variable or global variable.the expression just for an example.Happy...
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CalcVal cannot pass the output of previous run to the next run on simulation...
Hi, I have the followig Run Plan setup."GV_Mismatch_sigma" comes from MC simulation of the "FINDING_UNTRIMMED_OFFSET" run.I can see its value at the output of "FINDING_UNTRIMMED_OFFSET" run.But,...
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Voltage controlled Current source (VCCS) for ideal OTA
Hello,I have designed an OTA that has spec details such as- i) Gain (Av) = 43.2 dB, ii) Phase margin (PM) = 85.55 degree, iii) GWB = 430 kHz. The OTAs are used in the pixel circuit as shown in the...
View ArticleLiberate - Constraint search failed
Greetings to the Cadence Technical Community!I was trying to characterize a couple of sequential cells in Liberate when I came across this error.I am using the -auto_index option and I've set the...
View ArticleVerilogA loop generate constructs not defining multiple sub modules
Hi,I am using Cadence ICADVM20.1-64b.200.21 with SPECTRE20.1.231.isr6 64bitI am using very simplified codes here (empty modules) to simplify the problem statement. Similar behavior is happening with...
View ArticleBS170 Transistor Burnt Up?
I am working with a BS170 Transistor to turn on/off a series of LEDs using a microprocessor to control the gate. It seems that my transistor has stopped working as it does not ever turn off. Does this...
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Exporting several DC sweeps (OP transistor params) to CSV in an organized way
Hi,I'm doing a DC sweep on a single transistor. I also would like to sweep the lengths and widths.I have solution for now, but it's highly unsatisfactory, so I would like to be able to exhaust all the...
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Performing AMS simulation in cadence virtuoso, the voltage value printed out...
Hello! Recently, I am learning to use AMS simulation in virtuoso. I build a circuit of 8421 counter:During the simulation, I set the power supply voltage for the digital module to 3.3V:After the...
View ArticlePower calculation
How I can calculate average power of the digital circuit which has 3 bit output and drawn current? I have simulate Vdd terminal to see current in the transient simulation. But i don't know it whether...
View Articleuser defined parameter in dynamic parameter transient simulaiton
Hi There, I'm trying to run Transient simulation with Dynamic parameter option ON. I did transient analysis with variable temperature with time. There is no issue with it,In another simulation, I...
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Layout Instantiation shows a line
Hi All,I see a small triangle in the bottom left corner of instantiated layout blocks , why am i getting this? I have encircled the region in blue. Thanks for your help!
View ArticleVerilogA $fopen issues when used in a loop
Hi,I am using Cadence ICADVM20.1-64b.200.21 with SPECTRE20.1.231.isr6 64bit.In my VerilogA module, I am trying to write some values to a file after the simulation ends.In order not to overwrite the...
View ArticleVerilog-A Parser shows an error but simulation runs successfully with 0 errors
Hello All,I am trying to use the genvar in a loop.I am able to run a simulation using the following command: spectre testbench.scsThe results of the simulation are as expected.The problem/confusion is...
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5 Terminal MOSFET to exploit the Bipolar Operation of MOSFET
Recently I was studying the lateral and vertical parasitic BJT present in MOSFET. So can we use these BJTs. One of the instance I saw in the literature was a 5 terminal device which i think is Gate,...
View ArticleMaestro file become very large
I have been accumulating tests in one maestro file (45MB).It is taking quite sometimes to open and do simulation, especially when using Run Plan.I thought it is just like that because I put so many...
View ArticleAssembler-4040 Failed to fetch results from Matlab script
IC6.1.8-54b.500.22Matlab r2020bIn Assembler I'm using a simple Matlab script in the outputs list that creates a couple figures and a plot and then sets axlResult=99. The first time I simulate, the...
View ArticleInstallScape - failed to install component: cdsPython
I haven't been able to install the latest hotfixes for IC618 through InstallScape. The only message I was able to retrieve at th logs was:Failed to install component: cdsPython64b_lnx86...
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