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Performing AMS simulation in cadence virtuoso, the voltage value printed out exceeds the set power supply voltage value

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Hello! Recently, I am learning to use AMS simulation in virtuoso. I build a circuit of 8421 counter:

During the simulation, I set the power supply voltage for the digital module to 3.3V:

After the transient simulation is completed, I use "results->print->transient node voltage" to view the node voltage:

The result shows that the voltage of some nodes is 5V, which exceeds the maximum 3.3V set. And it seems that only the nodes of the digital circuit part can display specific values, and the nodes of the analog part of the circuit display question marks (Vdd, net3, and net4 are all nodes of the analog circuit part.)

Why is there a 5V result? And why can only the nodes of the digital circuit part display specific values? I don't know where I made a mistake 

Thank you very much!


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