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Problem to avoid the removal of some capacitors with low values with Spectre...
Hi guys, I have a critical application where all capacitance values must be considered. The Spectre XL is removing some capacitors and I need to avoid it, I have searched for the solution in the user...
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2-stage CMOS OTA: LVS errors
Hello all,I've been trying to build a layout for a 2-stage CMOS circuit. I've already checked and corrected with DRC (even though I still get "hot nwell" info on the transistors that are connected to...
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convert selected signed out signal to unsigned
Hello, my output is 3 bit. It shows range of -4 and 3, naturally as a sıgned. But output of error cancellation network shows between -3 and +4 in result of noise cancellation with adder and...
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generating DC files for inter-dependent Tests in ADEXL
I've been looking over manuals and posts and can't seem to find an answer to this: I have a several dc files to improve convergence of DC simulation. Each DC-file refer to a different value of a...
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How to backannotate Monte-Carlo DCOP simulation results to schematic
Hello,My design breaks over some iterations at Monte-Carlo sim and I need to investigate the issue and see what is broken in the schematics. I can run the single Monte-Carlo sample sim that causes the...
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sample count
for the 10n clk and 36 bit input, What number of sample count should be in the 0-100Mhz for power spectral analysis? I know that sample frequency 200e6 in this range. According to this, I run the...
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conflict between schematic_pin view and symbol view
Hi All,I have a testbench with config view. For many of the cells the config view is set to “schematic_pin”. The testbench used to simulate fine earlier but seems there have been some changes to the...
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Ohm My God!
I have a circuit that involves monitoring the voltage across a 66k ohm resistor with a Schmitt trigger. I got the circuit working just fine in Spectre and then layed it out - however I needed to tweak...
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how to set env variable of probe option
Hi,I want to set the probe function in schematic_XL option to enable (which can be activeated by probe/F3): _geProbeOptionsForm->_geProbeAppItem->layout->value = tAnyone know how to set env...
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Difference between "Extract Layout" and "Update" in Cadence Virtuoso Layout...
Hello,I would like to know the difference between the "Extract Layout" and "Update" in Cadence Virtuoso Layout tools.It looks for me that "Extract Layout" also do the update to the net and do the same...
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PAC simulation issue, "No valid time points are specified"
I am facing a problem with pac simulation. This is the error that I see.ERROR (SPCRTRF-15168): No valid time points are specified for the sampled analysis `pac'. The analysis is skipped.To fix the...
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Import spice netlist to schematic, problem with "netset" property
Hello, I need help to import correctly spice to obtain the schematic of a digital library.I have reported below the setting using to import the spice netlistI have modified the device map and the...
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LVS and QRC in higher hierarchical layout design level
Hello,If I am at high level oh hierarchical design, suppose it is level 5, and if I do the LVS , will it go only to compare on that level or it run for all levels in the design down to level 0....
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Spectre : Invalid component name was given as value of parameter
For https://github.com/promach/AC_analysis_methods/tree/main/GNT , why spectre throws me the following error ?\
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How can I get raw data at Cadence virtuoso?
I run my simulation and I got a result. (Fig.1)(Fig.1 My simulation)And I want to get raw data of this result.How can I get this?Please tell meThank youyysunj
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How can I adjust time range of result?
This is my simulation result.By the way, I want to adjust time range from 0~1.000055s to 1~1.000055s.How can I do this?Please tell meThank youyysunj
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How I can simulate input current noise in Chopper Amplifier using PSS+PNOISE...
HII want to simulate a Chopper Amplifier, my circuit input source is current. The chopping frequency is 2.5k Hz, and the input signal frequency is 100 Hz. I use virtuoso version 6.1.4 (IC6.1.4.485)...
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Options to set Environment Variables with envSetVal
envSetVal is a very useful API for custom configuration. But I haven't been able to find the list of options that can be changed. envGetAvailableTools() helps with the list of tools. But if I want to...
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Amplifier bandwidth determination.
Hello,I want to simulate a model design in which I want to distribute a ramp signal through a buffer amplifier. With this, I want to analyze what bandwidth I need in order that my ramp signal should...
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How to show missing Concurrent Menu on VLS-XL / VLS-GXL?
We are planning to use Concurrent Layout Editing (CLE) but it is missing, see image below.How can we show the Concurrent Menu?Thanks & best regards,
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