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How to use a component (VerilogA) within a .scs model file to drive output...
Hi,I have a .scs model file for a digital block. The digital block has some multi-bit (bus) outputs. At the end of the .scs file, there are a bunch of statements to drive the outputs of the blocks:v1...
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ERROR (SFE-23): "input.scs" 19: X0 is an instance of an undefined model f_opAmp.
I am getting this error when tried to simulate ideal op-amp from library named 'functional'. Can someone help me to fix it.Thanks,Jaisal
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how to run skill script from csh
how to run skill skill script from csh environment? I find the skill command from $install/tools/dfII/bin/skill, but skill command (for example schPlot) can not be executed in the skill shell.
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Is there any way to add a new empty strip on ViVa?
Is there any way to add a new empty strip on ViVa? I would like to add a new one not split strip. Thanks.
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How can you change the waveform viewer defaults to thicker lines and not dotted?
I've looked over a couple previously posted solutions, e.g.:https://community.cadence.com/cadence_technology_forums/f/custom-ic-design/34307/default-colors-in-waveform-viewerHowever I can't seem to...
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Cascaded display.drf loading
I have an on-going battle with Virtuoso trying to make things work and/or not look disgusting with everything on a white background (so I can always have WYSIWYG when I print stuff). I made my own...
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Voltus-FI: How to automate the creation of selfheating-aware EM/IR text...
Hi,After an EM/IR run completes, the menu item: results > EM/IR Data > Report can generate non-selfheating-aware EM/IR text reports.To get selfheating-aware EM/IR text reports, we open the viewer...
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What's the difference between 'all' and 'allpub' in the save options form of...
Hi,I need help on several questions:1, What's the difference between 'all' and 'allpub' in the save options form of ADE L? In the Cadence Help, I see that the difference is 'Voltage from an internal...
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Simulation is too slow
I am having a problem with running time in ADE L. I wrote a zero detector circuit in verilog A and added this to my schematic. However, I don't know why this caused the simulation is very very slow. It...
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Plot DNL and INL of DA converter across codes
Hi all,I'm trying to plot a DNL and INL od DAC across all the codes.I run simple DC sweep simulation and I already have Calculator expressions for DNL and INL. Now I would like to run MC simulation and...
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ADE option compatible spice2 in IC6.1.7
Hi All.In IC 5.1.41 in ADE -> Simulation -> Options -> AnalogThere were settings for compatibility spice2.Where are these settings in IC6.1.7?I really need them.
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Importing PSPICE or TI models into Cadence Virtuoso
Hi everyone,I've started a few months ago working on Cadence Virtuoso 6.1.7 and I've been able to import models using this guide (e.g. this model), unfortunately it doesn't work for some particular...
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Convert Assura .rul to Diva?
Hello, 1. Assura may need to be installed separately. However, is Diva always installed alongside Virtuoso? a) which executable file or shared libraries (.so), or paths should we check for Dvia's...
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Plot large signal transfer function from duty cycle to output voltage of a...
I would like to plot large signal transfer function from duty cycle to output voltage of a simple dc-dc converter such as buck converter. How can I do this? Thanks.
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terminals "cannot be found in the switched master of the instance"
I get the message in the title when I try to simulate my circuit. The circuit contains a symbol of a custom device which I described in Verilog-A code. I know the Verilog-A code should work because I...
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Opening ModGen (Module Generator) in Cadence
I was working with ModGen two weeks ago and it was fine. Now, I wanted to go back and do some modifications but I cannot open the menu! I used the following path:Windows -> Assistant ->...
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How to set Vref of Opamp in adhLib
Hi everyone,I use Opamp in adhLib to simulate the inverting voltage circuit.with input Voltage is linear funtion in range -1 to 1 ( I use Vpwlf to make it)My point is with input Voltage in [-1;0], the...
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Is there a method for simulating a circuit with varying temperature?
I wanted to know if there was a method for varying the temperature with time. How might one go about doing this?Thank you
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Auto route STOP at symbol boundary?
Hi, Although for top-level components, layout GXL works find and we can auto route connection, "auto route" does not appear to work between different level of hierarchies.For example, in the attached...
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Avoid/Blacklist model instance from PDK
Îs there a way to blacklist/whitelist dedicated models from a PDK ?I my case, we do have a PDK with different models for a MOSFET - standard models ("nch") and macro models (nch_mac").The macro models...
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