Dynamic Temperature Simulation
I was looking at Temperature Evaluation - Custom IC Design - Cadence Technology Forums - Cadence Community and was wondering if that is still the case. My question is for the case thatI have a...
View Articledft and psd function in viva
Hi,I try to understand the difference between psd and dft function when display spectrum by them. 1. The psd result is always with same shape as dft result, but shifted below by tens of dB. How to...
View ArticleRunning the power sic MOSFET model using the spectre simulator
I used onsem's sic mosfet model (NTHL040N120M3S)for double pulse test simulation which will generates large voltage and current, but the simulation results were not satisfactory,just as follows:This...
View ArticleSet DC sources voltage from csv file
Hello everyone,I have 100 VDC sources in my design and I'd like to set the voltage of each source from a csv file for transient simulation. What's the best way to do it?
View Articleway to run dm & cm stb in one simulation
Hi,I have to run dm stb and cm stb in one transient simulation, at different instants. I have some experience to run several stb with different probes by editing .scs file and give the description of...
View Articlehow to simulate spatial variation to see benefit of common centroid layout
Is it possible to run post-layout simulation with spatial variation (Monte Carlo) in virtuoso to see the benefit of common centroid layout?
View ArticleGain peaking in TIA
Dear folks,As part of an optical receiver system, I have a Transimpedance amplifier (TIA) simulated using ADE-L simulator. This TIA has a significant gain peaking (close to 5 dB) in its frequency...
View ArticleNetlist fails due to missing "nlAction" value
We receive IP packages (OA-libs) from partners in which the instances do have the user-property "nlAction" without any value given.This results in netlisting-errors, because "nlAction" requires the...
View ArticlePDK patch installation through 'virtuoso -nograph' requiring Xvfb is not...
In the posts Xvfb has replaced cdsXvnc as the -nograph display server and The New Virtuoso nograph Server Xvfb was made default it turns out that Xvfb is the new 'virtuoso -nograph'...
View ArticlePegasus DRC No Outputs Displayed - Rdb File read error
Hi. I am having trouble with my DRC runs in Pegasus 22.14. After running the DRC, the Results Viewer displays empty. And no DRC error reports are even visible.There is a message that says read error on...
View ArticleHow to assign the multiplicity factor a pPar() parameter ?
Hello everyone,I want to apply a multiplicity factor to a cell (for simulation only) that should Inherit the m-factor from a parent parameter.Thus I have added an "m" parameter to the cell and gave it...
View ArticleAMS simulation within MC
Hi, I am running a tran simulation within Monte Carlo. The simulator is AMS- Spectre: 21.1.0.664.isr16- Xcelium: 22.03-s001My Cds version is ICADCM20.1-64b.500.30. I can confirm that the simulation is...
View ArticleHost ID
Hi,I was trying to access some training videos from the cadence support website. But I could not understand whats meant by host ID.
View ArticleRandom values assigned to parameters in multiple devices with Monte Carlo...
Dear all,I have a question on the random value assignment to parameters in multiple devices when doing MC simulations. If I have several devices in my circuit, the assignment of a random value is only...
View ArticleWhat is a good way to work, modify and get back / extend your ADE setup?
Hi,a very typical scenario is this:You start with maestro and get an Assembler setup e.g. with 2 tests and a certain corner setup.Then you focus on special topics and create e.g. further testbench...
View ArticleExtracting a value at a certain frequency (harmonic balance simulation)
Hello community,I want to get the Y-axis value at frequency of 5 MHz (in this case -5.44 dB) to the expression editor or export to a table, how can I do that? I couldn't find any expression that is...
View ArticleLVS of a mixed signal design with a digital IP block?
I have finished the design and layout of an analog/mixed signal chip. There is a digital IP block to be included. I can DRC and LVS the entire design successfully if the digital block is removed from...
View Articleabout cadence virtuoso version
Hi, I have a basic question about cadence virtuoso version, every time my company receive the email from noreply@cadence.com, saying there is new version of cadence virtuoso available, e.g.,IC6.18.320,...
View ArticleAssigning Different Models to Specific Instances?
Version: IC6.1.8-64b.500.28Hello,I am fairly new to positing on here so I'll do my best to stick to the rules as close as possible so I apologize in advance.For simplification, I am trying to do a test...
View ArticleHow to use value function in calc with multiple interpolation time that is...
Hello, I want to know the values of green signal when the red signal goes low.Using cross function, I am able to generate a list of time stamp (yellow) that shows when the red signal goes down. I put...
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