Clik here to view.
BJT models HiCUM (bht)
Hello, I came across a Spectre NPN transistor model that uses the hicum bht directive. I am looking for more information on bht level and it also applied to HBTs. I wasn't able to find any information...
View Article"Fixed Parameter" option in "Detail - Transpose" Virtuoso results display -...
Hi,I am running Virtuoso simulations and looking at the results in Detail - Transpose view. I notice there is an option "Fixed Parameter", which when unselected removes the columns related to variables...
View ArticleClik here to view.
Maestro : Width of columns in "Results" Tab is large. How to reduce it?
Hello ,For me, the width in the results tab is very big and I need to reduce it every time I run a test. The attached image would give more insight into the issue. Any idea how to adjust it or where do...
View ArticleSetting dynamic parmeter in pss analysis
Hi,I am running a pss (shooting) simulation to generate accurate delay values by measuring appropriate crossing events of input & output signal. I want extremely high accuracy in these delay values...
View ArticleClik here to view.
DRC check and LVS check has no error but still seeing the layer error?
Hi,My LVS and DRC error are all clean but still the following error is visible in my layer.In general I want to confirm if I run the actual DRC check and LVS check and it shows no error, it is enough...
View Articlesetting cell's view in config as dynamic parameter
Hi,I am running a transient sim to verify design performance with ams simulator. The design is complex and clocked block slow down the simulation significantly. I would like to use vams view to replace...
View ArticleClik here to view.
Spectre warning: there are some nodes and instances from the netlist topology...
Hello everyone!When I complete the layout of a cmos inverter and try to implement the post-simulation of it, there is a warning:It reminds me that some instances (source and load) and nodes are...
View ArticleClik here to view.
NO DC solution found(No convergence) when use ADEXL,but use ADEL is right.
I simulate a buf with multiple feedback loops. When I use ADEXL simulate corners, many corner displays sim errors. The output log displays NO DC solution found(No convergence). But I use ADEL to...
View ArticleClik here to view.
Changing my Email address and problem in signing to cadence support portal
Hello,I have a problem in signing to my training dashboard from Cadence Support portal, It looks like I lost the access to the help center and I directed to the page as shown in the figure below:Also I...
View ArticleNoise Summary per Instance
I am looking at this thread but cannot understand how to get the same results for my case. Noise contribution of an instance - Custom IC Design - Cadence Technology Forums - Cadence CommunityUsing ADE...
View ArticleCannot Install cadence IC618 on rhel 9
My institution have been using IC618 on rhel 7. Recently we decided to upgrade to rhel 9.I am getting this error,2023/05/24 13:48:33 WARNING This OS does not appear to be a Cadence supported Linux...
View ArticleClik here to view.
Check VCO oscillating in transient and PSS
I designed a low power LCVCO. When I tried to lower it's current as more as possible, I must check what minimum current the VCO needed for starting oscillation. At first, I used PSS and enable...
View ArticleVirtuoso Schematic L "spider" effect
HiI am doing an analog on top design that has a relatively complicated schematic and I know a few revisions of Virtuoso ago, there was a feature within the "Dynamic Net Highlighting" that would throw a...
View ArticleADE Assembler Plotting Template Issue
Hi,I had 3 tests in ADE and run nominal, and created a nice template. Next I extended my test suite, having now 7 tests, thus I want to extend the plotting template for the new outputs& tests...
View ArticleChanging default height, width and resolution in VIVA Save Image form?
Is it possible to change the default values of the Save Image form?I've looked in the documentation, but so far the 'best' solution is using an OCEAN script, however, this seems not ideal. I would like...
View ArticleRerun History in Assembler with more points enabled while re-using previous...
I ran a long sweep of multiple variables on a single test in Assembler and disabled about half of the points in the Run Preview tab. After running I decided I want to enable all the points and have...
View ArticleClik here to view.
Boost converter Design
I am designning a conventional asynchornuous boost converter with an input of 150mV to 2.8V output, But the ripple is to big, I dont know how to optimize this design
View ArticleHow to get the precise time instant of a strobed waveform
Hi All,Assume in the waveform there are N1+N2 strobe points, the strobe time is defined by me which is T1 and T2.How I can get the last strobe point time in the waveform N1 or 1st strobe point time in...
View ArticleClik here to view.
Boost Converter Design Help
Currently Simulating a boost converter with a comparator and Tapered Buffer, my Error Amp will be simulated after I will get a very good result with this one:Specs:Tech Node = 65nm500mV = input2.5V =...
View ArticleClik here to view.