gpdk045 substrate file
Hii,I am using gpdk045 for EM simulation in ADS. where can I get substrate file(.ltd) format for this pdk?
View Articleerror in digital verilog code
Good afternoon everyone,I have an error in verilog coding . the following blue line indicates an error. This is my error:ncelab: *W,CUVMPW (./arraym8.v,7|26): port sizes differ in port connection...
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Trouble with automatic route
When I was routing after place the stdcell,the tools have some warning,and it have not auto routing.Here is the warning:
View Articleopen a file and write in it (Verilog-A)
I wrote that code to open a file and write in it , but there is syntax error (@ (initial step)) highlighted with red colour// VerilogA for my_library, write_file, veriloga`include...
View ArticleQRC error undefined symbol:...
Hi All,I am running qrc using Quantus EXT191 which throws the below error.undefined symbol: _ztin12openaccess_418oaconflictobserverins_8oaappdefelj0eeeIs this because of any wrong bashrc file path? I'm...
View ArticleFetch the "pass/near/fail" result for use in other expressions?
HiIn ADE Assembler, is there a way to capture the results of specs (pass/near/fail) to use them to make summary expressions?Currently, I have a setup like this:expr1 spec1expr2 spec2expr3...
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HBAC and HBXF for Oscillator Sensitivities Simulation
Hi,I'm working on a Pierce crystal oscillator and would like to simulate the sensitivity to bias current changes (how many Hz does the frequency change if the bias current changes by one uA?). The...
View ArticleRunning corner PVT sims with scalar output evaluated but waveforms not saved
Hi,I am trying to find an option in ADE Assembler wherein I can get my scalar value evaluated outputs but don't have the waveform saved for each run. I have many corners (500+) so saving that much...
View ArticleAMD EPYC processors and Cadence support
Hello, we use cadence Spectre and also Genus, Innovus, Xcelium from Digital Design and signoff tools. We are in the process of choosing a new server. We are stuck between AMD EPYC 3rd Generation 3D-V...
View ArticleFont Size for Trace Info Overlay in ViVA
Hello,I've been successful in changing font sizes for everything in ViVA through the envSetVal commands in my cdsinit except for the x/y + trace info that pops up when you hover over a trace. I looked...
View ArticleIs it required a particular license to plot internal VerilogA parameters?
Hello everyone.I'm trying to plot internal variables of my VerilogA model (they are defined as electrical nodes), but I'm facing some issues.To do so I click to "Outputs->To be Saved->Select OP...
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will the phase of the pss period affect sampled pnoise result? can I control...
Hello, everyone. I understand the sampling/aliasing/ktc/chop-modulation.Here is a ping-ping choped amplifer. When OPA1 is during auto-zero, only OPA2 drives output, and vice versa.Auto-zero will...
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how to set the default number of digits in the sim log
Hi,I have long tran simulation. The total sim time can be tens of seconds. The on-going simulation log only shows 4 effective digits asIs there any way to increase the number of digits in the time...
View ArticleInstance bBox vs Flattened bBox
Hi,I want to know the difference between instance bBox and flattened bBox in top cellview.I think instance bBox and flattened bbox are same In the top cellview. However, i saw instance bBox is ((18.185...
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"ERROR`` in cadence license (The desired vendor daemon is down)
Hello all,I am facing the problem in cadence license issue. It is showing like "failed to launch the application because the license required to initialize Virtuoso Framework is not available". To...
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What does Noise Contribution Option in transient simulation mean?
I'm recent run a tran simulation with noise on, but need some part of the circuit be quiet. Will the /off Option in Noise Contribution achieves the purpose? For example, as in figure, will /I3 and...
View ArticleVDC with DC = 0V and transient noise has a average of 0V
Dear all,I'm struggling to create a noise source for the power supplies of one of my testbenches. During my online search I found out that the exact same problem was already reported in Cadence_Forum...
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cmdmprobe from analogLib
so I am looking at this component and wanna make sense of how it does calculate the loop gain.from here we have (1) in1 = out1(2) (in1 - out1)*CMDM = in2 - out2, but from (1), that yields in2 = out2.so...
View Articlepointer precision in cadence virtuoso layout XL
When I try to draw a path or move any object in the virtuoso layout XL window, I am able to do so only in steps, as in the pointer moves in steps and thats why I am not able to draw anything to an...
View ArticlespextreX accuracy preset as dynamic parameter
Hi,Is there any way to define spextreX accuracy preset as a dyanmic parameter in tran simulation?I know in traditional spectre, we can use errpreset to control. But I have no clue about spectreX....
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