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open a file and write in it (Verilog-A)

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I wrote that code to open a file and write in it , but there is syntax error (@ (initial step)) highlighted with red colour

// VerilogA for my_library, write_file, veriloga

`include "constants.vams"
`include "disciplines.vams"

module write_file;
integer in_file_0,in_file_1,data_value;
analog begin

@ (initial step) begin
in_file_0 = $fopen ("/Home/ee610/my_library/write_file/data1.txt","w");
in_file_1 = $fopen("/Home/ee610/my_library/write_file/data2.txt","w");
data_value =1;
end
$fclose(in_file0);
$fclose(in_file_1);
endmodule


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