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DRD setup and usage with Calibre DRC Deck

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Hi all,

I am trying to use DRD into virtuoso with a calibre DRC deck but I don't find howto !

I see into an older post that it is possible, somebody can help me ?

Best Regards,

Olivier


how to add a pdf printer to .cdsplotinit

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Hi,all:

    Is there a way to add a virtual pdf printer to .cdsplotinit as a plot device to make it able to print cadence schematic to pdf files?

Regards

Average from Sweep Simulation Spectre

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Hello to everybody.

I am currently running sweep simulations in Spectre, and I keep track of the various delays. However, I do not know how to compute the average of these quantities.

Could someone help me?
Thank you.

Differential Stability Probe (diffstbprobe) in Stability analyses

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Dear friends,

I am using the diffstbprobe to test the differential loop gain characteristics of my fully differential amplifier. I am connecting the amplifier with unity gain closed loop with inputs tied at the VCM. I put the diffstrbprobe as shown in figure below which I am sure it will break amplifier loop.

The simulation is working fine but I have two questions please,

Is the loop gain I am getting by running this simulation is the (vo1 - vo2) / (vin1-vin2) which is the true differential gain,

or it is with respect to one of the outputs, by this case I have to multiply it with 2 manually.

My second question please is when I run the STB analyses it give me two options for the diffstbprobe: differential and common. I use the differential option for the differential loop simulation, but does it it means that if I change the setting  to common then I will be able to use the same probe for simulating the common mode feedback loop  without changing the circuit configuration ?

Thank you very much in advance

Differential mode stability test

Noise analyses in Cadence for differential Op-amp

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Dear friends,

I would like to ask your help if you could guide me to the simulation of the noise for the fully differential op-amp, mainly I am interesting in to finding the Input referred noise (IRN).

Thank you in advance

Save state not working with transient monte carlo simulation

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Hi,

Can the State File transient option be used in monte carlo simulation? I'm trying to save the states of 10 long transient simulations at a specific time. I'm using specific seed and run numbers in monte carlo sampling to keep the conditions same for the successive runs. But there is no file generated after the simulations are completed.  However, when I enable the Run Nominal Simulation option one file is saved. Is there a way to save the circuit states for only the monte carlo simulations?  Versions I'm using are:  Virtuoso IC6.1.5-64b.500.17 and Spectre 15.1.0.466.isr5.  Thanks.

Regards,

Debajit

Problem to initialize Quantum after update

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HI,

I just updated ASSURA and EXT to the newer versions (ASSURA41 and EXT191).

I succeeded in running LVS but when I try to run Assura - Quantus to make a parasitic extraction, it generates an error:

*Error* putprop: first arg must be either symbol, list, defstruct or user type - nil

<<< Stack Trace >>>

(... in _quiAddDefaultsToVuiQueueing ...)

(... in _quiGetQueuePreferences ...)

(... in _quiCheckForQueuing ...)

(... in _quiInitRunLocation ...)

(... in _quiInitRunDetailsTable ...)

(... in _quiInitRunForm ...)

(... in _vuiMakeRcxRunForm ...)

(... in _vuiRcxInit ...)

(... in vuiQrcInit ...)

(... in _qrcuiOpenAssuraRunForm ...)

_qrcuiOpenAssuraRunForm()

Any help please ?

Thanks

Emmanuel

Optimization and Montecarlo simulations

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Hello,

is there a simple way in ADE-XL to run global optimization on each single run of a Montecarlo simulation?

Best regards,

Luigi


Info on "oblist"

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Hi all,

I am debugging some internal legacy SKILL and have come across some code that is using "oblist"

It seems that this is some internal Cadence list (when trying to change it  I am getting:  "*WARNING* (Parser): oblist is a reserved name and cannot be assigned to"

This list, for one particular user, is extremely large so I am curious how this list gets generated.

I am searching for a pop-up window id so I thought I would use hiFormList instead of oblist.

Can anyone shed a bit more light on this list and how it is generated?

Thanks

Colin

CMRR simulation of fully differential amplifier

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Dear Sir,

I would kindly ask you if there is an easy and robust method to simulate the CMRR from closed loop connection of fully differential amplifier, 

is it possible to use diffstbprobe in this simulation ?

My concern about simulating the CMRR from the open loop configuration is that I need to compensate the amplifier for the input offset voltage before simulating the common mode gain, this will create a problem when I want to simulate the CMRR for the entire range of the ICMR. 

Thank you very much in advance

ERROR (SFE-841): "input.scs" 19

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Hi,

I'm trying to implement an example from Andrew written in verilog A using ADEXL spectre, I have written the following code to simulate Chi distribution in monte carlo


module FET_MC1_Chi(Drain,Gate,Source,Sub);

parameter real mean =19;
parameter integer seed= 1234;
parameter real rpoisson_mis=$rdist_poisson(seed,mean,"instance");
parameter real rpoisson_proc=$rdist_poisson(seed,mean,"global");

localparam real a_eff = a+ rpoisson_mis + rpoisson_proc;
localparam real b_eff = b ;

endmodule

and my statistical block is the following

parameters mean=0.0;

statistics {

mismatch {

vary mean dist=gauss std=1.6
}
process {


vary mean dist=gauss std=0.1
}

}

The error observed are

ERROR (SFE-841): "input.scs" 18: Unexpected character `$' in netlist.
ERROR (SFE-841): "input.scs" 19: Unexpected character `$' in netlist.

Additionally it makes seedmeaninstance and seedmeanglobal as two variables..

I have also written ahdl_include FET_MC1_Chi.va to mitigate the problem. However, to which I got the error

 Can not open input file `FET_MC1_Chi.va'. No such file or directory. Ensure that the file exists and the path to the file is correct. Otherwise, use the -I<path> command-line option to specify the path to the file.

To solve this I tried implementing setenv CDS_VLOGA_INCLUDE /.automount/infofa/h/users/skare0/FET/model5

Please give me your valuable suggestion to what I'm doing and how can I connect it. I'm using IC617

Regards

Shobhit

How to set axis info when plot across design Points

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Hi, I have a simple question when I run variable sweep. After sim, if plot across design points, the X-axis is always from point 1 to point N. That is not what I want. E.g., i sweep variable of R, i wish to display X-axis as this "R". How I could set such feature ?

BR

Output Dynamic range of the fully differential amplifier

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Dear Sir,

I am using my fully differential amplifier in the read out circuit of sensor bridge and driving an ADC. 

As you know that the resolution of the ADC to convert the output signal of the amplifier is limited to the noise level at the output of the amplifier. This value I would like to simulate for my amplifier, 

So please how can I simulate the signal to noise ratio of the output of fully differential amplifier by using cadence. 

Thank you very much in advance 

sim error 5033

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when I ran the PVT simulations, many simulations suffer the error. part of job log is shown below.  

\o Loading paraplot.cxt  
\o WARNING (ADE-3079): Simulation is complete; however, simulation results are currently unavailable.
\o This may be due to file system delay in reading the simulation data.
\o You can specify a timeout value after which results should be made available.
\o For this, set one of the following environment variables in your .cdsinit file:
\o - tryNFSSync (if host system is remote)
\o - tryNFSSyncLocal (if host system is local)
\o If the issue persists, contact Cadence customer support for assistance.
\o
\o *Error* Error ID = 5033
\o *Error* Error Msg = Simulator failed to complete the simulation.
\o
\o
\o
\o
\o
\e IO Error 0 (Success) on Display ":95"
\e Aborting due to fatal X IO error.
\w *WARNING* Process was terminated with SIGABRT signal
\o Local time (crash) Wednesday 20 March 2019, 12:31:31 AM
\o
\o *Info* Received signal SIGABRT.

Simulation error in ADEXL, runs fine in ADE

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Hi Team,

I face this peculiar problem, whenever I switch to ADEXL to run a bunch of simulations (ADE standalone simulations run fine). The ADEXL simulation errors out saying

ERROR (SFE-874): "input.scs" 43: 63: Unexpected integer "0". Expected close parenthesis. Cannot run the simulation because of syntax error. Correct the error and rerun the simulation.
ERROR (SFE-683): "input.scs" 43: Badly formed parameters statement.

A huge string of parameters (DPAR_* as shown in the below snapshot) are defined by ADEXL which are not part of the intended design variables list (not seen in the netlist parameter set generated by ADE).
And ADEXL sets one of these parameters to 0 (highlighted in green) and flags it as an error. 

I did search for this issue on this forum and on google, found no discussion about it. So I'm posting it here.
Any suggestions are welcome. Thanks!


'spectremdl' not showing any results...

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Hello folks!

I am trying to use Spectre MDL to measure the delay of an inverter under different NMOS and PMOS width combinations. I am very new to MDL -- indeed it took me a lot of effort to find that MDL is the right tool to do it. However, the 'spectremdl' command did not seem to work for me.

Below are my MDL script and Spectre netlist.

File 1: inverter.mdl

alias measurement propDelay {
input real prop_thresh
run tran( stop=3n, autostop='yes )

export real risedelay=deltax(sig1=V(in), sig2=V(out),
dir1='fall, n1=1, start1=0, thresh1=prop_thresh,
dir2='rise, n2=2, start2=0, thresh2=prop_thresh)

export real falldelay=deltax(sig1=V(in), sig2=V(out),
dir1='rise, n1=1, start1=0, thresh1=prop_thresh,
dir2='fall, n2=2, start2=0, thresh2=prop_thresh)
}

run propDelay(prop_thresh=1.5)
/*
mvasearch {
parameter {
{pw, 300n, 600n, 900n, 1.2u}
{nw, 100n, 200n, 300n, 400n}
}

exec {
run propDelay
}

zero{
tmp1 = propDelay->rise-25p
tmp2 = propDelay->fall-25p
}
}

run mvasearch
*/

File 2: inverter.scs

simulator lang=spectre
global 0

include "tsmc20N.m"
include "tsmc20P.m"
parameters pw=900n nw=300n

// Library name: Tutorial
// Cell name: INV1
// View name: schematic
N2 (out in 0 0) tsmc20N w=nw l=200n as=1.5e-13 ad=1.5e-13 ps=1.6u \
pd=1.6u m=1 region=sat
P0 (out in net11 net11) tsmc20P w=pw l=200n as=1.5e-13 ad=1.5e-13 \
ps=1.6u pd=1.6u m=1 region=sat
V1 (in 0) vsource type=pulse val0=0 val1=3 period=2n delay=0 rise=50.00p \
fall=50p width=1n
V0 (net11 0) vsource type=dc dc=3
C0 (out 0) capacitor c=100.0f m=1

// Spectre Source Statements

// Spectre Analyses and Output Options Statements

// Output Options
simOptions options
//+ reltol = 1.00000000E-03
//+ vabstol = 1.00000000E-06
//+ iabstol = 1.00000000E-12
//+ temp = 27
//+ save = allpub
//+ currents = selected

// Analyses

// End of Netlist

My university provides 3 versions of Cadence. For each version, I seemed to get a different problem. The Cadence versions I tried were 'tap cadenceIC5', 'tap cadenceIC6', and 'tap cadenceIC617'.

If I do tap cadenceIC5 then do spectremdl inverter.mdl, Cadence seems not happy with the TSMC technology files and I got a bunch of errors of the same form like 
"tsmc20N.m" 6: Syntax error in .model statement.

If I do tap cadenceIC6 then do spectremdl inverter.mdl, the MDL just throws 2 lines and I see no result files in the folder: 
Defaulting ./inverter.scs as the -design argument.
Running /dept/enee/software/cadenceIC616/inst/INCISIV/tools/bin/spectre =mdl inverter.mdl ./inverter.scs

If I do tap cadenceIC617 then do spectremdl inverter.mdl, I was given an error: spectremdl: command not found.

I checked the MDL reference for both IC6 and IC617 but cound not find what was wrong. Any idea on what I should do will be greatly appreciated.

Best regards,

Yuntao

Failed to initialize incremental netlisting

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Hello,

    The log content:

\o ERROR (OSSHNL-153): Failed to initialize incremental netlisting because the run directory contains
\o netlist data from the previous netlisting session which has a corrupt global
\o map structure file '/xxx/maestro/results/maestro/Interactive/1/xxx/netlist/ihnl/globalmap'. Remove the "ihnl" and "map" directories from the
\o current run directory and netlist again.
\o 
\o "ERROR (OSSHNL-512): Failed to generate netlist because incremental netlisting data from the previous session is corrupt or missing. Clean the run directory and netlist the entire design.\n"
\o End netlisting Mar 6 12:02:05 2019
\o ERROR (OSSHNL-514): Netlist generation failed because of the errors reported above. The netlist might not have been generated at all, or the generated netlist could be corrupt. Fix the reported errors and regenerate the netlist.
\o ...unsuccessful.

Failure description:

Maestro is mapped from adexl by "open with". Test_A is defined by config.  Simulation using adexl is fine. 

When run sim with Maestro (assembler), such incremental netlist problem happen. 

When define Test_A by schematic, no problem. 

I try to re-start cadence, remove history, not fix. 

Anyone has clue ?

BR

Signal to Noise Ratio simulation in cadence

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Dear Sir,

I am trying to find the signal to noise ratio at the output of my fully differential amplifier by using the Spectrum tool from the ADE after running the transient analyses, but it is giving me unexpected result. For the simulation I am applying Sin signal with full output range and the amplifier is buffer connected. 

therefore I would like to ask you please about the appropriate setup to measure the SNR at the output of the amplifier.

Thank you in advance

Save state from transient and use it for initial AC conditions

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Hi,

I have a large circuit with long startup time. I am running a transient simulation until the system has reached steady state (LDOs are up and running etc), then i start an AC simulation at a predefined time using the ?actimes and ?acnames parameters.  

The problem is that this is not very efficient, since the transient takes a long time, and the AC is rather quick. If i could run the transient once, save the state and then be able to run the AC from there, i would save a lot of time. 

How can i save the state from the transient, read the state and use it as a start state for my AC simulation? I am using spectre version -17.1.0.307.isr6. 

Creating a user defined source (Voltage and current)

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How to define a current or a voltage source ?
For, example:

if     v(t) = (100+100t)e^(-100t) V       and       i(t) =   (100+220t)e^(-1000t) mA.

How to create any user defined source not limited to the example ?

The source could be any signal.

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