I deleted my all of schematics by "delete by view".
It is so important to me that I recover my schematics. HOW can I recover those?
please help me.
I deleted my all of schematics by "delete by view".
It is so important to me that I recover my schematics. HOW can I recover those?
please help me.
Hi there,
I have the netlist file input.scs , on top is spectre but may include hspice files.
I need a script/utility/command to extract from the entire hierarchy all the subcircuit definitions and the associated pin names of for each subcircuit.
The order of pin names should be the same as in netlist.
I assume that somehow spectre is doing all this stuff internally, is there any possibility to dump this info in a flat text file to be parsed after that?
Thank you,
Marcel
Hi,
I've recently migrated to Cadence from Mentor. Could you please let me know if there is a way to import my Mentor S-edit files into Cadence?
I would really appreciate the help, since this would save me hours of schematic redrawing.
Thanks!
I am using Cadence Virtuoso IC6.1.7-64b.500.21 with ADE-L.
I find it in multiple cases that when I open view->annotations->Setup and try to add more DC Operating Points, the whole cadence session will be freezon. I come back the next morning, it is still hanging there. I have to kill it. Is this a bug?
Hi
How to setup connectivity between layout and schematic?
How i can know the net names in layout ?
i m using Virtuoso 6.1
Regards
Amit
Hi! I'd like to solve the known problem of barely-readable Virtuoso tooltip colors (white text in pink background) in GNOME. I repeatedly found the solution to fix it in KDE, but I was unable to find an equivalent procedure in GNOME. Has anybody been able to achieve this?
Thanks and regards, Jorge.
I'm doing a temperature sweep using:
analysis('dc ?saveOppoint t ?param "temp" ?start "-40" ?stop "120" ?step "20" )
Aside from the usual voltages and currents, is it possible to also plot an operating point aspect of a device e.g. mn1's threshold vth or transconductance gm?
Hi,
How to check the length and perimeter of all the nodes by writing PVS rule.
Thank you
Pranay
Hi All,
I have a transistor level description of a custom standard cell which is made of pass transistors and transmission gates.
As can be seen, since the input buffering (i.e. an inverter) is missing (i.e. input B) in this type of a cell, the input capacitance seen at B input depends on the capacitive load presents at the output. How can we indicate this to Liberate and make the input capacitance of the cell a function of output load capacitance instead of a fixed value ?
Thanks in advance
Anuradha
Hi! The QRC extraction of various cells is failing due to them having port names that use the "+" character. For example, In the QRC log file I get:
+ERROR (LBMISC-215479): at "agds2rcx": syntax error in file /path/to/my/svdb/my_cellname.ports because of an invalid character '+' at line 12
(and in the my_cellname.ports file I see that line corresponds to the entry associated to a port named "clock_latch_N+1").
Is is possible to make PVS/QRC support these port names with the "+" character? We have many cells affected by this, so we'd like to avoid the pain/risk of changing them now (tapeout time).
Thanks and regards, Jorge.
Hi! I am getting the following warning when performing Quantus extractions with the FS extraction mode:
WARNING (NEBULAM-135092): Design is using device stack extraction in 'TSMC finfet' node. Foundry is supposed to provide separate field solver techfile with MEOL stack description. With current techfile you are not going to get sign-off certified accuracy for nets connected to MEOL devices. If you do have FS technology file and still see this warning request Cadence support to recover accuracy.
Do I need to have some additional decks installed in order to use the FS extraction mode? I am using Quantus 18.2.1-s210 on TSMC 16FF+ PDK.
Thanks and regards, Jorge.
Tools and Tech:
ST 65nm | LIBERATE Library Characterization Platform (x86_64) 12.1.4 (altos 121) | Cadence Virtuoso 6.1.5-64b | Calibre Interactive - PEX v2012.4_16.11
I am trying to characterize a full custom designed cell.
The problem is that Liberate tool does not write any *.lib file out and no error or log file is generated by Liberate so that I can find the issue out?
Any Idea how to proceed or solving the issue?
Any better or even the corret way of getting extracted netlist and model files?
The simple script which I use comes from example codes of liberate and Virtuoso Liberate Reference Manual 18.1
set ROOT "/home/PROJECT"
source ${ROOT}/PATH.tcl
source ${CHAR_SCRIPT}/parameters.tcl
set MODEL_TYPE spectre
set_operating_condition -voltage ${my_voltage} -temp ${my_temperature}
source ${CHAR_SCRIPT}/template_example.tcl
read_spice -format spectre ${CHAR_MODELS}/${MODEL_TYPE}/${MODEL_TYPE}_corners_ss.scs
set spicefiles ${CHAR_NETLIST}/Inv.pex.spi
read_spice $spicefiles
char_library
write_library TTTT.lib
Hi,
I'm using ocean script to run Monte Carlo Simulation. Everything is fine when the start iteration index (MonteCarlo parameter: ?startIter) is smaller than 1M.
However, when ?startIter becomes larger than 1M, I found the Monte Carlo output is not able to be printed to the csv file.
Below gives an example:
I start 10 Monte Carlo simulation with ?startIter = 1000001. Ideally, the output csv file should have corresponding 10 Monte Carlo simulation results from iteration 100001 to iteration 100010.
It shows that the monte carlo runs successfully in the terminal, e.g.
However, in the output csv file, iteration 1000001 to iteration 1000009 are missing, only shows 1000000 ( actually is not wanted) and 1000010:
=======================================
In my oceanScript, the "output to file" command is:
ocnPrint(?output fp value(VT("/out") 5e-09) ?precision 10 ?numberNotation 'none)
Can anyone help me to find where is the problem?
Thank you in advance!
Hi, I have a question on how to perform SKILL functions in command line mode.
What I want to do is to
(1) start cadence with no GUI.
(2) perform a series of SKILL function (defined in a do file) such as adding tech file to a library, adding layers.
(3) quit cadence
Heard that virtuoso -nograph option would work but it looks like I need to setup some unix environment variables to make that command work. Not sure what environment variable should I be adding in .kschrc files. Can anyone help?
Thanks.
Hi All,
I have an extracted netlist with parasitics given by foundry for a standard cell library. A part of the netlist is shown below (which looks more like a .cdl than a pex.netlist)
I imported the entire netlist (File->Import->Spice....) to an OA symbol library (in IC 6.1.5) by attaching to the corresponding technology library. The device mapping file looks like below:
However when I run ADE on one of the imported component, simulation fails with a list of errors like below:
Error found by spectre in `_sub0', during circuit read-in.
ERROR (SFE-23): "input.scs" 579: c0 is an instance of an undefined model CAPACITOR.
ERROR (SFE-23): "input.scs" 580: c1 is an instance of an undefined model CAPACITOR.
ERROR (SFE-23): "input.scs" 581: c2 is an instance of an undefined model CAPACITOR.
ERROR (SFE-23): "input.scs" 582: c3 is an instance of an undefined model CAPACITOR.
ERROR (SFE-23): "input.scs" 583: r4 is an instance of an undefined model RESISTOR.
ERROR (SFE-23): "input.scs" 584: r5 is an instance of an undefined model RESISTOR.
ERROR (SFE-23): "input.scs" 585: r6 is an instance of an undefined model RESISTOR.
ERROR (SFE-23): "input.scs" 586: r7 is an instance of an undefined model RESISTOR.
ERROR (SFE-23): "input.scs" 587: r8 is an instance of an undefined model RESISTOR.
ERROR (SFE-23): "input.scs" 588: r9 is an instance of an undefined model RESISTOR.
And it looks like the parasitic components of imported cells have either RESISTOR or CAPACITOR as model name which hasn't been defined in model library. However this is not the case when Parasitics are manually extracted for a custom cell.
Any resolution for this ?
Thanks and Regards
Anuradha
Hi Everyone
I am end up with such a situation:
On one hand, I'd like to skip loading the .cdsinit into icrp in ADEXL, as the in-house wrapper significantly slow down the launching process.
This can be done by setting the environment variable by the command:
envSetVal("adexl.icrpStartup" "binaryName" 'string "virtuoso -nocdsinit")
But on the other hand, my expression in the adexl relies on a custom-defined function, which is used to be loaded via the my .cdsinit.custom.
I notice that the custom-defined function needs to be loaded by icrp, otherwise I will get "eval error".
Thus I cannot disable loading the .cdsinit for icrp.
Then I have such a paradox now.
I'd like to ask, is there way to load a particular skill script for icrp without loading .cdsinit.
Many thanks in advance.
Best Regards
Yi
I'm looking at a layout that had several dummy devices placed for matching purposes that do not exist in the schematic. I know how to generate schematic devices in layout but is it possible to do the opposite procedure?
hello experts,
just wondering when I annotate from dc sweeping simulation (e.g., sweeping by temperature from -40 to 125 degree), how I specify to annotate device operating points at temperature of 0, or 25, or 85 degrees? is that doable from ADE and/or Ocean script?
thanks,
David
Hello,
I did look at save command documentation in user and reference guide. But it still looks confusing to me.
I am specifically looking for commands to do following two task:
1) probe all nodes of subckt but ignore nodes connected to parasitics (can be easily done in X4 using exclude=*:*)
but in X0 following is not working
saveOptions options save=allpub nestlvl=2 subckt=H12P_SUBCNTL filter=rc exclude=":"
2) probe subckt currents like VDD and VCS for all subckts to a given depth
in X0 following is not working
save x*.*VDD sigtype=subckt
Please help?
Thanks
I don't know what happened and my Cadence tool suddenly switched to dotted lines by default in ViVA. I would like to set solid lines by default. Does anyone know where and how can I do this?