Hi,
I try to use the following command to activate Spec Markers in ADEXL Plotting Options, but failed. Anyone has clue ?
envSetVal("asimenv.plotting" "specMarkers" 'boolean t)
BR
Thanks
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how to activate Spec Markers in ADEXL Plotting Options ?
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Working with schematics on a white background
I have my schematics world configured for a white background - I have chosen appropriate colors for wires, symbols etc. so everything looks great. One last remaining issue I have is that when I draw a selection rectangle around things like wires and text, they highlight as white and so on a white background that means they're invisible. Does anybody know how to fix this?
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How to edit dependent expression in ADEXL to represent specified corner sim result ?
Hello, suppose I have run a process corner simulation (FF, SS, TT) to find transconductance of input diff pair. I can define "Gm" as the output name.
Then I wish to edit expression across corner to check Gm(FF)-Gm(TT) and Gm(SS)-Gm(TT), how I can edit such expression in output setup ?
BR
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odd techLayerProperties "?" and "()"
Hello,
techLayerProperties makes perfect sense. However, in a file called “analoglib” (which I dumped), I saw things like
----------------------
techLayerProperties(
;( PropName Layer1 [ Layer2 ] PropValue )
;( -------- ------ ---------- --------- )
( canDrawOnLayer? ("90" drawing ) t )
( layerSelectable? ("90" drawing ) t )
( streamDatatypeNumber ("90" drawing ) 0 )
( streamLayerNumber ("90" drawing ) 0 )
( streamTranslateLayer? ("90" drawing ) "FALSE" )
( canDrawOnLayer? (hardFence drawing ) t )
( layerSelectable? (hardFence drawing ) t )
( streamDatatypeNumber (hardFence drawing ) 0 )
( streamLayerNumber (hardFence drawing ) 0 )
( streamTranslateLayer? (hardFence drawing ) "FALSE" )
( canDrawOnLayer? (softFence drawing ) t )
( layerSelectable? (softFence drawing ) t )
( streamDatatypeNumber (softFence drawing ) 0 )
( streamLayerNumber (softFence drawing ) 0 )
( streamTranslateLayer? (softFence drawing ) "FALSE" )
( canDrawOnLayer? (y0 drawing ) t )
( layerSelectable? (y0 drawing ) t )
( streamDatatypeNumber (y0 drawing ) 0 )
( streamLayerNumber (y0 drawing ) 0 )
( streamTranslateLayer? (y0 drawing ) "FALSE" )
( canDrawOnLayer? (y1 drawing ) t )
( layerSelectable? (y1 drawing ) t )
( streamDatatypeNumber (y1 drawing ) 0 )
( streamLayerNumber (y1 drawing ) 0 )
( streamTranslateLayer? (y1 drawing ) "FALSE" )
( canDrawOnLayer? (y2 drawing ) t )
( layerSelectable? (y2 drawing ) t )
( streamDatatypeNumber (y2 drawing ) 0 )
( streamLayerNumber (y2 drawing ) 0 )
( streamTranslateLayer? (y2 drawing ) "FALSE" )
( canDrawOnLayer? (y3 drawing ) t )
( layerSelectable? (y3 drawing ) t )
( streamDatatypeNumber (y3 drawing ) 0 )
( streamLayerNumber (y3 drawing ) 0 )
( streamTranslateLayer? (y3 drawing ) "FALSE" )
( canDrawOnLayer? (y4 drawing ) t )
( layerSelectable? (y4 drawing ) t )
( streamDatatypeNumber (y4 drawing ) 0 )
( streamLayerNumber (y4 drawing ) 0 )
( streamTranslateLayer? (y4 drawing ) "FALSE" )
( canDrawOnLayer? (y5 drawing ) t )
( layerSelectable? (y5 drawing ) t )
( streamDatatypeNumber (y5 drawing ) 0 )
( streamLayerNumber (y5 drawing ) 0 )
( streamTranslateLayer? (y5 drawing ) "FALSE" )
( canDrawOnLayer? (y6 drawing ) t )
( layerSelectable? (y6 drawing ) t )
( streamDatatypeNumber (y6 drawing ) 0 )
( streamLayerNumber (y6 drawing ) 0 )
( streamTranslateLayer? (y6 drawing ) "FALSE" )
( canDrawOnLayer? (y7 drawing ) t )
( layerSelectable? (y7 drawing ) t )
( streamDatatypeNumber (y7 drawing ) 0 )
( streamLayerNumber (y7 drawing ) 0 )
( streamTranslateLayer? (y7 drawing ) "FALSE" )
( canDrawOnLayer? (y8 drawing ) t )
( layerSelectable? (y8 drawing ) t )
( streamDatatypeNumber (y8 drawing ) 0 )
( streamLayerNumber (y8 drawing ) 0 )
( streamTranslateLayer? (y8 drawing ) "FALSE" )
---------------------
Each line have a “?” after t_propName, and there is no “t_layer1 [t_layers2]” but rather a parenthesis-contained pair.
Does this file make sense?
G
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x_count@techDerivedLayers : formal definition?
Hi,
techDerivedLayers(
( t_derivedLayerName x_derivedLayerNum
( tx_layer1 s_op tx_layer2 )
[ x_count | t_rangeVal ]
[ 'diffNet | 'sameNet ]
[ 'exclusive ]
)
…
)
x_count The number of times contact must be made between the shapes on the two layers forming the derived layer. Valid Values: Any non-negative integer.
although there is good explanation on various s_op, the document lacks definitions on x_count is reckoned. If we have rect1 on layer1, covering <topleft,bottom right>{{-1,0},{0,-1}}, and rect2 on layer2, covering <topleft,bottom right>{{0,0},{1,-1}}, the two shares an infinitely thin edge. There are lots of trivial cases like this.
So how is the "number of contacts" counted? By counting pieces of mininum area block? Please provide a formal definition.
G
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IEEE-like spec on CDBA and OA
Hello,
In lots of places and legacy projects I saw “prop.xx”, which libManager describes as preceding data.dm.
- The prop.xx is defined in CDBA
- Data.dm is defined in open access
- Both seem to refer to “property bag” info
It was difficult to find good formal specification for CDBA and OA (like IEEE specifications which are like “one-stop” gold standard). Could Cadence post some links here?
Also, could you explain what exactly is “property bag”?
G
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How to change schematic items like pins and solder dots from outline to solid display?
How do I change the display of schematic items like pins and solder dots from outline shape to a solid shape?
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drplJitter function help
Hi,
When running pmjitter based phase noise measurement. The drplJitter function is used to obtain a sec/sqrt(Hz) plot. Where can I find help for this function?
drplJitter(?result "pnoise_pmjitter" ?unit "Second" ?k 1 ?event 0)
1) What does "k" represent in the above function?
2) Is there a way to obtain SSB phase noise plot in dBc/Hz using pmjitter?
Thanks
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Tech libs fundamentally incompatible?
Hello,
Under a sample library, if I edit the cds.lib add tsmc13rf, when launching virtuoso & again it prompts me that many display packets are found. To address this I merged the different display.drf into a big one in the sample library, overwriting its original display.drf.
But when launching virtuoso & again, although the display looks good, at various steps it prompts me with messages like changed layer.
In the ultimate, which display.drf is being used is dictated by settings in .cdsinit/.cdsenv. Although one can change CSF (search file mechanism) to make it go through different .cdsinit/.cdsenv, or just manually edit .cdsinit/.cdsenv, I wonder different technology files might not be able to coexist.
- Because different tech libs used different layer stack, via size, chemistry, different DIVA rules, perhaps it is just not recommend to use different tech in the same virtuoso session? Please confirm this.
- If there is lots of legacy design, and one wants to be able to quickly adapt it to different foundries (TSMC/SMIC/global foundries/MOSIS), is there any tool?
- Would OA (openaccess) be of any help here? Does Virtuoso by default use OA format or Cadence’s own format?
G
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Eye Diagram Plot Zoom In Problem
Hello,
Right now I am working on a transceiver and I need to measure the eye openings precisely. However when I zoom in in the eye diagram plot, it shows different lines that do not exist in zoomed out version of the diagram. If I zoom in very much, it shows a lot of lines which makes the eye completely closed. I think that these lines that are generated are not real because I cannot put a marker on them. Also, when I use eye aperture function from the calculator, it shows an opening considering the zoomed out eye diagram.
My question is that, how can I be sure that there is no fake lines with a certain zoom scale so that I can measure the eye opening properly?
Thank you.
Firat
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Run stops at 0/1
Hello,
With a simple design having just one input and one output pin, the stimuli was specified as a 1n pulse, and output was picked on schematic as the output pin.
After clicking the green Run button (with white right-headed triangle), the status always stays at “running – 0/1” without progressing. If we instead choose Monte Carlo instead of “Single Run, Sweeps and Corners”, it always stays at 0/200.
The library was tsmc18rf.
Please advise us on what is run with our simulation.
G
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Creating or loading Eye mask in Eye Diagram plot
Hi there,
I am using Virtuoso version IC6.1.5.500.6
I have created Eye diagram plot from trace. Now I want to create a eye mask to check the compliance or to check with existing industry standard. I have checked in this link, that there is existing industry eye mask but I don't have it in my existing version probably.
Is there any option to create it in my eye diagram? Here is the screenshot of my eye diagram in Virtuoso
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Boost Converter power dissipation calculation
I have designed a boost converter with a ramp input of 1MHz. I need to find out the power dissipated at different modules (like error amplifier, boost cell, comparator etc.) separately. May I know the steps to do this. I am using Cadence virtuoso for simulation.
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Verilog A to symbol
Hi,
Im trying to make symbol using verilog A, the design is actually formed using 3 files; so in the beginning I have included the file using " 'include abd.vams" but while compling it seems that its to able read that file? One of the file is written in verilog-ams.
Am I missing any step?
Thank you in advance
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Editing Signal names in ViVA
Hi,
Is there any way to edit the signal name properties (such as font, size, color bold etc ) in the Virtuoso Visualization and Analysis (ViVA) graph window. I can see the option to edit the signal name text, but not other properties. Please suggest.
Regards,
Vijay
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PSS not completing in post extraction design
I want to run PSS, Pnoise and Pstb analysis on my design. The problem is PSS doesn't complete when I used netlist created from QRC extracted design (i.e. after layout). All the above analysis run if I do it on schematic level netlist. The netlist size is around 18.6 MB and I have a lot of switching in my design for e.g. chopping.
I did the following to solve this problem:
1. Optimization during RC extraction. I used many options under the 'filtering' tab in Assura QRC extraction window. For e.g. set the minimum R to 0.1 Ohm, reducing parasitics option etc. The size reduced to 10 MB but still the PSS doesn't complete.
2. I am using ++aps with circuit preset as 'sampled' and enabling post-layout optimization with legacy RCR.
However, PSS still does not complete.
The machine I am using has 32 GB RAM. I have added the link to spectre.out and cds log file.
Is there anything I can do to make it run? I am running PSS with tstab as 300u (circuit will take that much time to settle) and not saving the transient result.
Spectre.out:
cds.log
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Monte Carlo Simulations of Extracted Layout
Hello,
I wanted to do the Monte-Carlo simulations on a extracted layout (DC analysis). As recommended by a previous comment, I made a "config" view for the test-bench and did the DC analysis in ADEL successfully. However, when I am going to do it for the extracted view in the ADEXL, I receive this error:
"Monte Carlo run stopped because no statistical data generated for the test"
Does anyone has an idea how can I solve this problem? As another question, can I use some schematic designs together with these extracted views and do the Monte Carlo simulations on them? In other words, I do not have the layout of some blocks but I like to know how to they work with the extracted blocks. My Cadence version is IC6.1.6-64b.500.6
Thanks!
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check spacing between nets with Diva DRC - Net tracing with Diva - Need inputs
Hi,
I am writing a diva drc deck to check for space between two nets (not shapes) A net can have a bunch of shapes that are connected.
I tried the below way to do this,
- trace the nets Net1_name and Net2_name.
- compare drc() between them
drcExtractRules(
m1 = geomOr("M1")
via1=geomOr(via1)
...
... upto top metal
;connect all shapes
geomConnect(
label( ("m1" "label") m1)
via(via1 m1 m2)
label( ("m2" "label") m2)
via(via2 m2 m3)
... up to top metal
)
;get the shapes that belong to the required net
netm1 = geomGetNet(m1 "Net1_Name")
netm2 = geomGetNet(m2 "Net2_Name")
.... upto top metal
fullNet1 = geomOr(netm1 metm2 ...)
netm1 = geomGetNet(m1 "Net2_Name")
netm2 = geomGetNet(m2 "Net2_Name")
.... upto top metal
fullNet2 = geomOr(netm1 metm2 ...)
;compare drc between them
saveDerived(drc(fullNet1 fullNet2 0<sep<10) "DRC error")
)
Problem with this approach is that it takes way too long to run for a big cell even though the nets I am looking for a very small. I found that the connect statement is the one that seems to take a lot of time as it tries to connect the whole layout which is not necessary.
Any suggestions on how to do this in an efficient way.
Thanks,
Naveen
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Plotting BJT operating point parameters for DC sweep
Hello,
I am using cadence 6.1.6 and I am trying to save BJT operating point parameters such as gm, ft, beta etc during a DC sweep. I saw some cases on community forum and inserted below lines to my save.scs file and sourced it in Setup -> Simulation Files -> Definition file:
save Q0 :: oppoint
but in the result browser I don't see dc-dc folder although it is present in my psf directory.
Can you please help me with this?
Thanks.
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Metal routing not getting extracted
Hi!
Some of the metal routings are not getting extracted during QRC extraction. I have a screenshot of av_extracted view to explain my problem. As can be seen in the image, some part of metal is not getting divided into rectangles i.e. not getting extracted into resistors and capacitors.
I am doing RC extraction with max fracture length as 5 squares, full chip all nets and resistance mesh disabled. In filtering tab, I have chosen the option to merge parallel R and set Min R to 0.001 Ohm. How to solve this? If I copy that particular metal routing in another layout window without rest of the blocks, it does get extracted.
Thank You.
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