Quantcast
Channel: Cadence Custom IC Design Forum
Browsing all 4888 articles
Browse latest View live

Image may be NSFW.
Clik here to view.

Transformation of one technology to another technology?

how to transform a parameter of one technology to another technology in VLSI design? if we know the value delay and power in 180 nm technology how to calculate power and delay in 90 nm manually?

View Article


Image may be NSFW.
Clik here to view.

PNoise simulation of dynamic comparator

Dear experts,There has been some prior discussion on this topic (https://community.cadence.com/cadence_technology_forums/f/custom-ic-design/16943/noise-analysis-on-dynamic-comparator) and based on the...

View Article


Image may be NSFW.
Clik here to view.

AHDL read-in errors

Hi,the simulation with Spectre of a netlist with many proprietary VerilogA model is failing due to the following errors:Error found by spectre during AHDL read-in.ERROR (VACOMP-1008): Cannot compile...

View Article

Image may be NSFW.
Clik here to view.

DRC ERROR

how to resolve the following drc error which is shown in the image?

View Article

Image may be NSFW.
Clik here to view.

ymin() returns unexpected error for a waveform family

Hi Everyone,I can not get the minimum value of a waveform family. I would expect that ymin returns a waveform where the Y values are minimum y values of the waveforms in the waveform family and the X...

View Article


Image may be NSFW.
Clik here to view.

Inherited Parameters in Callbacks

How can i use it ?The manual says:Do not use callbacks based on parameters whose values are defined by expressions that include inherited parameter functions.But if i need it, how should i make it ?1....

View Article

Image may be NSFW.
Clik here to view.

Pad and Pad Frame

can anyone tell how to make pad and pad frame in gpdk 90 nm technology?, and what is the tolerance level for any circuit after post-layout simulation?

View Article

Image may be NSFW.
Clik here to view.

Defining device performance with inserting resistance data

I simulated inverter with two verilogA table based models.But it showed output value higher than Vdd value in some Vgs range.I don't know what is problem, so I tried to change some parameter of the...

View Article


Image may be NSFW.
Clik here to view.

How to get the cap vs frequency of a MOS by using cadence?

I'm trying to do some simulation of cap-connected MOS, but can't find a way to obtain the curve of its' cap vs frequency. Because I want to get the image part of R (real part ), then using 1/jwc to...

View Article


Image may be NSFW.
Clik here to view.

Cannot attach a library file to an existing library

My library was working perfectly fine before and I was able to run calibre DRC. But suddenly it stopped and gave this error " Layout export failed or was cancelled". And then I closed cadence but when...

View Article

Image may be NSFW.
Clik here to view.

cds_srr and saving multiple dc oppoint

Hello,I am trying to save the dc operating points of nfet and pfet as shown in the input.scs file from this...

View Article

Image may be NSFW.
Clik here to view.

regarding the netlist

Can anyone tell me how to extract the netlist in from the layout in cadence?

View Article

Image may be NSFW.
Clik here to view.

Incisive vs Spectre XPS

Hi,I have a question that may be out of scope of the forum but I couldn't find an answer anywhere else. The question is:Is there any difference between Incisive and Spectre XPS in terms of performance,...

View Article


Image may be NSFW.
Clik here to view.

A good way to track license usage per user-id and hours ?

Hi,does anyone know a good and easy way to track the license usage per user and time (in hours) ?Before I start to create a custom script, I would like to ask if someone has done this already and has...

View Article

Image may be NSFW.
Clik here to view.

Align for fluid guard rings

Hi,I'm using Virtuoso 6.1.7 version,I'm not able to use Quick Align command for fluid rings. Is there any option to select fluid rings using align commands?Thanks & RegardsVallabha

View Article


Image may be NSFW.
Clik here to view.

spectre captab: 1) negative capacitance 2) not reciprocal values

HI everyone,I wanted to get some node-to-node capacitance values of a transistor with the help of spectre's captab option. Unfortunately I faced two strange issues:1) In some cases I got negative...

View Article

Image may be NSFW.
Clik here to view.

Optimization method in ADE_XL or ADE_GXL

Hello,I would like to know about the optimization tool provided by ADE XL or ADE GXL, is this optimisation based on intelligent optimization algorithms (like GA and PSO) or it is simply performing a...

View Article


Image may be NSFW.
Clik here to view.

Transient stop time variable

Hi,Is there a variable that I can use in expressions for the transient stop time?

View Article

Image may be NSFW.
Clik here to view.

Finding the minimum voltage from a bus of signals

Hi all,Is there a way to find using expression the signal with the minimum voltage out of few signals in bus?For example:this expression will give set of 11 values :  value(VT("/vout<10:0>")...

View Article

Image may be NSFW.
Clik here to view.

Drain Current Noise Power VS gm

Hello all,            I tried to extract drain current noise power at 6 GHz of a single NMOS transistor in order to plot PSD versus gm under different channel width. I'm doing with hb and hbnoise while...

View Article
Browsing all 4888 articles
Browse latest View live


<script src="https://jsc.adskeeper.com/r/s/rssing.com.1596347.js" async> </script>