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on analoglib components doesn't show in input.scs
Hi, Officers, I am running the IC6.17 and after I have add the analogLib components such as But in the input.scs, it didn't show the independent source. // Design view name: schematicsimulator...
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Device checking output in Spectre
Hi all,I've got a model file .scs where I've set all rules for checking the maximum voltage across each terminal of my transistors. For example, each line is like the following:Assert_name assert...
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Layout problem when trying to see layers
When I try to zoom in order to see the layers of the device ,I tried to increase stop in options > display but it shows me a " X " fill. I tried to change properties, but I don't know exactly the...
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Difference between S3 and T3 layers being used as deep nwell in 22FDX.
Hi,I want to know the difference between S3 and T3 layers used in 22FDX as both of them are mention to be used for deep nwell in DRM .Is there any specific reason for their use ..I mean when and where...
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ADE Explorer spends excessive time "evaluating"
When I kick off a multi-run simulation in ADE explorer (for example a Monte Carlo run), it regularly spends an enormous amount of time where it reports that it is "evaluating", I'm uisng a machine with...
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Open Layout-L instead Layout-XL by default (even if phsyconfig exists)
Hi,I’ve noticed that when I select a layout view and right click to open it as read-only, it opens with Layout Suite XL instead of Layout L as long as a physConfig view is present.Is this the behavior...
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Plotting temperature w.r.t time( while changing temperature using dynamic...
I would like to know if there is anyway to plot temperature while changing its value in dynamic parameter w.r.t time. I am aware that in spectre.log , it asserts whenever temperature is changing w.r.t...
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Virtuoso_Schematic_Editor_XL License Checkout Failure IC 6.1.8
Hello,When using Library Manager new cellview in IC 6.1.5, it first tries to checkout Virtuoso_Schematic_Editor_L, fails, and then successfully checks out Virtuoso_Schematic_Editor_XLWhen using trying...
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Customize Extractor Form in IC6.1.7
Hi,I am using IC6.1.7 and would like to customize the extractor form: If I set a switch, the name of the extracted view should change automatically and contain a part of the switch's name. How can I...
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Dependent test-bench with different temperature simulation
Here is what my requirement is,1) First test-bench is for trimming the circuit. ( only @ 27C )2) In second test-bench, Trimming code obtained from first test bench , should be used but at other...
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Multicorner runs (batch mode)
ADEXL does not release its license once the multi-corner run completes. Is there a way to get ADEXL to generate the netlists and runSimulation files for all corners at once but not start the actual...
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DRC problem
I couldn't find divaDRC.rul file in my NCSU_TechLib_FreePDK45 technology library, It contains just rule file for calibre (calibreDRC.rul)Is it a normal thing not to find it?I tried to install and...
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Is there a way of disabling the Layout XL annotation browser highlighting?
In Layout XL, I find the annotation browser to be more of a hindrance than anything as it's continuously highlighting nets, dimming the layout etc, regarding things that I don't care about. Quite often...
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Trace update in VIVA with signals from AMS (analog mixed signal) simulation
I'm seeing a strange issue where the signals from the AMS simulation are updating differently in VIVA. All analog signals are updating or refreshing at the same latest time stamp as the irun.log, but...
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Verilog coding in Cadence Virtuoso
HelloI am using Cadence vertuoso IC6.1.5-64bIt is the first time for me to write verilog in Cadence,I have created new cell view in one of my libraries. I selected the Verilog with HDL reading option...
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Difference in transient simulation result between HSPICE and SPECTRE for RC...
dear forum members,I would appreciate it if anyone could help me with the following problem.When oscillator transient simulation is performed with HSPICE and SPECTER, oscillator settling time differs...
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print schematics to pdf file
Hi,I am using following .cdsplotinit fileEncapsulated PostScript|Encapsulated PostScript: \ :manufacturer=Adobe: \ :type=epsf: \ :resolution#300: \ :maximumPages#1: \...
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mdl to .measure conversion
Hi I need to convert following spectremdl statement into spice (.measure) format. Help needed.export real tpCs = cross( sig=trim(sig=V(cs), from=2n, to=7n), dir='cross, thresh=(((v(cs)@ 2n) >...
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Stop process temperature corner on certain device.
Hi All,I have an nmos device instantiated in my testbench that basically models the input stimulus to a DUT circuit. I would like to be able to apply process corners and temperature on my DUT but keep...
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Custom Signal probing options in ADE-L
I can go into ADE L - Outputs - Save All and choose (save)='lvl' and (nestlvl)='3' and this will probe all nets in the top 3 levels of the hierarchy. My question is : how about if I want to probe just...
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