Verilog coding in Cadence Virtuoso

Hello

I am using Cadence vertuoso IC6.1.5-64b

It is the first time for me to write verilog in Cadence,

I have created new cell view in one of my libraries. I selected the Verilog with HDL reading  option as you can see from the pictures I attached.

The problem is that I am unable to type in this editor ,

Thanks

Is there any setting that I must follow before I start with the Verilog coding in cadence ?