How to turn off blinking, diamond-shaped markers on the fet geometry in layout
Our group has recently switched to Cadence 6.1.8-64b.500.19 from 615, and we updated our design kit accordingly. Opening my previous designs, I see numerous diamond-shaped markers blinking at various...
View ArticleAC analyses issue in ADE
HI all,when I do the ac analyses in the ADE in cadence IC 5141, I set the dc and ac magnitute properly, but I found the node current equation was not satisfied in AC simulation. As the pictures shown...
View Article[SpectreMDL] Rise time not founf in transient analysis
Hello.I am trying to perform a few simulations, and I am unable to use the risetime function in spectremdl whereas the same expression is successfully evaluated in the calculator.Here is my output in...
View Articlevariables from CDF parameters
Hello, I have a cell in which the parameters of each instance depend from some CDF parameters of the cell itself.However the formulas are extremely long, and some instances should refer to the value of...
View ArticleGetting cell name for MOSFET transistor
Hi all.I am using IC6.1.8-64b.500.10I got request to get cell names MOSFET transistorsCan this be done?Best regards,Dragan
View ArticleADE Explorer Simulation Error
Hi,Whenever I run ADE Explorer it is giving "sim error". The error message that I got from job log is:-"Failed to launch simulator": "Errors encountered during simulation. The simulator run log has not...
View ArticlecalcVal and corner groups
Hi,In performing a set of calibration trim tests, I found a reason I'd like to use corner groups with calcVal. It appears this is not allowed (per tool manual, in my version, which is...
View ArticleAbout Multi technology simulation
I think it can be realized by setting all model files in Model library. What is different from the MTS option? And when I use the MTS option, should I click the button and set Model file one by one to...
View ArticleEdge Triggered Current Source
Is there a current source available that is edge triggered? The closest thing I've found is isource but the prbs option doesn't give the control I'm looking for. I'm currently using a verilogams model...
View ArticlePSpice model Editor in Spectre and Virtuoso
Hi All, Is there a PSpice model editor is available in the Spectre or Virtuoso to create a model library?Thanks
View ArticleHow to merge or hide the metal line from same metal layer in layout?
In a metal layer, whenever we need to add via than layout add a rectangle across the via areas. So when we fit it to window, layout looks like small rectangle boxes of same metal layer which doesn't...
View Articlespeeding up .hb at a certain stage
For a fairly large design, my .pss/.hb simulation spends hours calculating something after the initial transient and before printing the memory estimate. It is not using the multiple processors it is...
View ArticleXvfb installation error
Hi All,I am trying to run reliability simulation using IC618 ADE-XL where I am getting the below Xvfb ERROR.Though I have approached IT team for resolution (which is taking time) is there a workaround...
View ArticlePspice model of memrister running in Virtuoso
Hi Andrew, GreetingsI'm Ranjan, VLSI student from India. I want to implement the Spice model for memristor into cadence virtuoso in order to implement the memristor into my cmos based analog circuit....
View Articlethe toxic chemicals...
Myself doing lots of DIY had to bury any of my ideas to play around with homemade ICs because of the one crucial step: the chemistry. The toxic chemicals (especially the hydrofluoric acid for the...
View Articlequestion : standard cell symbol import to virtuoso
I want to import TSMC 65nm standard cell library into virtuoso.The. SPI file was successfully imported into schematic, but I used xxpwr.v importing symbol, some errors occurredThe following is the...
View Articleis it possible to pass integer to verilog-a module?
I want to create a verilog-a module that has an integer as input and binary code as output.it is a DAC, basically.Later I want to be able to sweep this integer during DC analysis.
View ArticleHow to report running time of simulation in adexl?
Hi,how can I report running time of Monte Carlo simulation in adexl? Is there any built-in function or option to do this? Thank for help!
View ArticleWhat is the Assembler equivalent of loading save output state in ADEXL?
With ADEXL if I had multiple testbenches in an ADEXL view and I wanted to replicate the complete output state (save all options + output expressions + nets/currents to save) I could just save an output...
View ArticleHow to embed waveform setup (.grf) in maestro views? (or: how to propagate...
Hi! is it possible to embed Viva setup information (.grf) in a maestro view, such that it can be version-controlled along with it, thus enabling consistent results display across users?Or, more...
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