Got stuck with the below error while trying to run a dc analysis for a two stage cmos op amp using freepdk15. Please help.
ERROR (OSSHNL-116): Unable to descend into any of the views defined in the view list, 'hspiceD spice cmos_sch cmos.sch schematic', for the
instance 'I9' in cell 'Opamp'. Add one of these views to the cell 'idc' in the
library 'NCSU_Analog_Parts', or modify the view list so that it contains an existing view.
End netlisting Apr 14 21:55:05 2023
ERROR (OSSHNL-514): Netlist generation failed because of the errors reported above. The netlist might not have been generated at all, or the generated netlist could be corrupt. Fix the reported errors and regenerate the netlist.
...unsuccessful.