In my current design setup, Layout XL mistakenly understand a dummy Metal _exclude_ (aka dummy block) layer to be connected to any overlapping Metal drawing shapes (with same Metal number) and thus misassigns nets during layout editing. I'd like to solve it by ignoring (i.e. excluding) the "exclude" purpose in the constraint set which XL uses to extract connectivity.
I found that to work well when I manually used the Net Tracer and / or MarkNet tool. In these tools F3 options dialog allows to create a "Custom" edits to connectivity set where I can specify which 'purposes' I want to exclude. I added 'exclude' to the list of excluded purposes (the similarity in wording here is unintended).
In Layout XL Options dialog I don't have such Custom choice, and have to choose from 5 preset choices (virtuosoDefaultExtractorSetup, foundry, Recommended ...). I suspect that the constraint set choices I see are a part of the techfile for the PDK. I'm looking for a way to add some modification directive to the existing constraints to accomplish the above.
I also found that Constraint Manager Assistant has a dialog called Process Rule Editor. Under "tech" category I see a list of 5 constraints that match the ones seen in Layout XL connectivity options. But the details of these constraints are not editable under 'tech' category, nor am I able to add a new constraint group of my own.
Is there a recommended process for this? I have Virtuoso IC6.1.8-64b.500.26
Thank you!
