Hello Sir,
Whenever I try to simulate any verilogA code the same error keeps on coming. The log file is attached herewith
Time for Elaboration: CPU = 279.958 ms, elapsed = 603.707 ms.
Time accumulated: CPU = 1.20981 s, elapsed = 1.44188 s.
Peak resident memory used = 40 Mbytes.
spectre terminated prematurely due to fatal error.
Time for NDB Parsing: CPU = 2.73958 s, elapsed = 4.86122 s.
Time accumulated: CPU = 2.73958 s, elapsed = 4.86122 s.
Peak resident memory used = 32.5 Mbytes.
Opening directory input.ahdlSimDB/ (775)
Opening directory input.ahdlSimDB//1153_cds_work_project_sarlogic1_veriloga_veriloga.va.sarlogic1.ahdlcmi/ (775)
Opening directory input.ahdlSimDB//1153_cds_work_project_sarlogic1_veriloga_veriloga.va.sarlogic1.ahdlcmi/Linux/ (775)
Compiling ahdlcmi module library.
Error found by spectre during AHDL read-in.
ERROR (VACOMP-1008): Cannot compile ahdlcmi module library. Check the log file input.ahdlSimDB//1153_cds_work_project_sarlogic1_veriloga_veriloga.va.sarlogic1.ahdlcmi/Linux/../ahdlcmi.out for details. If the compiler ran out of memory, use 'setenv CDS_CMI_COMPLEVEL 0', and try again. If the reason for the failure was a syntax error, contact your Cadence Customer Support representative with the netlist, log files, behavioral model files, and any other information that can help identify the problem.
ERROR (SFE-91): Error when elaborating the instance sarlogic1. Simulation should be terminated.
Time for Elaboration: CPU = 656.9 ms, elapsed = 1.82147 s.
Time accumulated: CPU = 3.41748 s, elapsed = 6.72062 s.
Peak resident memory used = 40 Mbytes.
spectre terminated prematurely due to fatal error.