Dear All,
I have created a VerilogAMSTEXT module called sync_block.
The module text looks like bleow :-
It has two instances sync_a ad sync_b. These are defined in separate files sync_a.v and sync_b.v.
Though these files are included in the Text, the config is NOT able to detect these cells.
Could anybody please tell how this issue can be overcome.
`include "constants.vams"
`include "disciplines.vams"
`include "/test/sync_a.v"
`include "/test/sync_b.v"
module sync_block #(parameter RESET_TOGGLE_LEVEL = 'b0)
(
input async_toggle_i,
input clk_i,
output pulse_o,
output toggle_delay_o
);
wire toggle_sync;
sync_a #(.RESET_LEVEL(RESET_TOGGLE_LEVEL)) i_sync (
.d_i (async_toggle_i),
.clk_i (clk_i),
.hw_reset_n_i (hw_reset_n_i),
.sw_reset_i (sw_reset_i),
.test_mode_i (test_mode_i),
.z_o (toggle_sync)
);
sync_b #(.RESET_TOGGLE_LEVEL(RESET_TOGGLE_LEVEL)) i_toggle2pulse (
.clk_i (clk_i),
.hw_reset_n_i (hw_reset_n_i),
.sw_reset_i (sw_reset_i),
.toggle_i (toggle_sync),
.pulse_o (pulse_o),
.toggle_delay_o (toggle_delay_o)
);
endmodule