Quantcast
Channel: Cadence Custom IC Design Forum
Viewing all articles
Browse latest Browse all 4891

Difference between mustJoinNet() and joinableNet() commands in Assura

$
0
0

I have two vss! pins at the top level of the chip which are supposed to be separate on the top level of the chip. But they both short to the P substrate of the chip. Eventually they will be shorted on the PCB. I tried changing the names of one of the pins from vss! to VSS_QUIET. I still get an LVS mismatch probably because they both are shorted through the P substrate. I changed the pin name back to vss!. That doesn't provide an LVS match either. If I use the                      joinableNets( cell(root) "vss!") command I get an LVS match. But if I use the mustJoinNet( cell(root) "vss!") I do not get an LVS match. What's the difference between the two commands? Which one is applicable in this situation?


Viewing all articles
Browse latest Browse all 4891

Trending Articles



<script src="https://jsc.adskeeper.com/r/s/rssing.com.1596347.js" async> </script>