Verilog-A block works with transient analysis but has no output with harmonic balance

I have a sinusoidal voltage source written in Verilog-A (taken from this wikipedia page). I've pasted my slightly-altered code below.

The component generates the correct sine wave output in a transient analysis but there is no output in a harmonic balance simulation. To be precise, the transient output from the HB sim is just noise with a peak amplitude of roughly 1e-33 V.

Does anyone know how to get the model to work for both time-domain and frequency-domain analyses? Do I need to use a conditional based on the analysis and have two different model implementations? I assume the issue lies in the use of $abstime but I haven't found an alternative in the documentation so far.

`include "constants.vams"
`include "disciplines.vams"

module sin_vsource_1(p, n);
    parameter real amplitude = 1.0;
    parameter real f0 = 1G;
    inout p,n;
    electrical p,n;
    analog begin
        V(p, n) <+ amplitude * sin(`M_TWO_PI * f0 * $abstime);
        $bound_step(0.01/f0);
    end
endmodule