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Assura LVS not running

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Hi,


I am trying to do LVS on old design (a simple buffer), but LVS seems to be running indefinitely without displaying an error as below.

When I view the log files (shown below), it does not seem that LVS is progressing.

I am also showing the Assura LVS settings.

It does not seem to be a layout or schematic issue as the circuit has already passed LVS in the past, but LVS stopped working for some reason. I appreciate any input if anyone has experienced this before. 

Thanks!

Bahaa

Note: The issue is for all designs and not just this one.  


emergency help!!! logic gates

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first of all, I apologize for my poor English

I use a logic gate like or from tsmc18sc library and want to simulate it with pulse input. when I simulate it in tran mode

the output is always zero

Pnoise sim with different noise type

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Hi,

I try to study PNOISE currently, and the simple Res+MOS switch+Cap is my schematic.

The switch Fs=1MHz, RES=10Kohm, CAP=1pF.

I found that there are many noise type in PNOISE setting as follow picture:

First, I try "sources" for sim output noise @vo_sc2 in my schematic above.

The sim. results are as follows (V/sqrtHz):

Then, I try "timedomain" for sim output noise @vo_sc2 in my schematic above.

The sim. results are as follows (V^2/Hz):

The results of  different noise type are quite different.

For "sources", we can see the SINC function (sin[x]/x) in the output noise waveform.

But for  "timedomain", the SINC function is not shown.

I would like to know whether noise type should I use for PNOISE simulation?

Thanks.

Liberate for library file

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Hello, everyone! I have a problem with the usage of Liberate.  The error information is 

*Warning* (write_verilog) : No function written for pin Q of cell balloon_sim_nognd

Then, I look at the verilog file, some information like that 

module balloon_sim_nognd (Q, D, NRESTORE, SAVE, CK);
output Q;
input D, NRESTORE, SAVE, CK;
reg notifier;
wire delayed_D, delayed_NRESTORE, delayed_SAVE, delayed_CK;
// Missing function for pin Q
// Timing

I don't know the reason.

Assura DRC decks writing

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Hi All,

I'm New to this forum and very happy to join you all.

I'm struggling in writing a rule deck in Assura which is already mentioned in Calibre.

The rule/syntax in Calibre 1: ACT_HORIZONTAL_EDGES = ACT ANGLE == 0
                                                   INTERNAL ACT_HORIZONTAL_EDGES > 0.048 < 0.088

The rule/syntax in Calibre 2: ACT_VERTICAL_EDGES = ACT ANGLE == 90
                                                   EXTERNAL ACT_VERTICAL_EDGES > 0 < 0.032 OPPOSITE
The Calbre two rules/syntaxes defines the horizontal width and vertical width with separate values/width and an equivalent image has been attached.Basically the derived layer is defined with an angle...

I would like to write same in assura syntax format, Please help.

Pcell Evaluation Failed Issue

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Hi,

I have an issue, when I invoke the tool I am getting pcell Evaluation failed for all the cells coming from techlib.

I am working in 10 nm and tech lib is cmos10lpp.

What I did is I copied cmos10lpp folder from one path to another path (into my local) and I added my local path to cds.lib

Then I tried to invoke the virtuoso (V12.3-64.b) then if I tried to open the layouts all the cells pointing to cmos10lpp are getting pcell evaluation failed.

I re invoked the tool and attached the techlib also but same problem exists.

I opened the layout then  in the verify ---> Markers --> Explain and then clicked on the layout then it is saying

location: ("cmos10lpp" "egpfet_b" "layout")
reason:   ("eval" 0 t nil ("*Error* eval: undefined function" Secln10lpp_mosfet))

Can any one tell me the solution please.

Jitter simulation, PSS +pnoise and matlab get different results

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Jitter is obtained in two ways, both of which first simulate pnoise.The first one gets pnoise curve, pnoise at various points from 1k to 10M, and then puts this value in matlab.

The second one is jitter directly through JCC or jc.

The first result is orders of magnitude larger, and that's why.

Integral procedure under the net, as follows, I think there should be no mistake

 

function Jitter = Pn2Jitter(f, Lf, fc)
%
% Summary: Jitter (RMS) calculation from phase noise vs. frequency data.
%
% Calculates RMS jitter by integrating phase noise power data.
%  Phase noise data can be derived from graphical information or an
%  actual measurement data file.
%
% Usage:
%   Jitter = Pn2Jitter(f, Lf, fc)
% Inputs:
%   f:  Frequency vector (phase noise break points), in Hz, row or column.
%   Lf: Phase noise vector, in dBc/Hz, same dimensions, size(), as f.
%   fc: Carrier frequency, in Hz, a scalar.
% Output:
%   Jitter: RMS jitter, in seconds.
%
% Examples: 
%  [1]   >> f = [10^0 10^1 10^3 10^4  10^6]; Lf = [-39 -73 -122 -131 -149];
%        >> Jitter = Pn2Jitter(f, Lf, 70e6)
%             Jitter = 2.3320e-011
%       Comparing fordahl application note AN-02-3{*} and jittertime.com{+}
%         calculations at fc = 70MHz
%        Pn2Jitter.m:                    23.320ps
%        AN-02-3 (graphical method):     21.135ps
%        AN-02-3 (numerical method):     24.11ps
%        Aeroflex PN9000 computation:    24.56ps
%        JitterTime.com calculation:     23.32ps
%
%    {*} fordahl Application Note AN-02-3:
%                                        " hase noise to Jitter conversion"
%        http://fordahl.com/images/phasenoise.pdf
%         As of 11 May 2007 it also appears here:
%          http://www.metatech.com.hk/appnote/fordahl/pdf/e_AN-02-3.pdf
%          http://www.metatech.com.tw/doc/appnote-fordahl/e-AN-02-3.pdf
%
%    {+} JitterTime Consulting LLC web calculator
%        http://www.jittertime.com/resources/pncalc.shtml
%         As of 5 May 2008
%
%  [2]   >> f =  [10^2 10^3 10^4 10^5 10^6 10^7 4.6*10^9];
%        >> Lf = [-82  -80  -77  -112 -134 -146 -146    ]; format long
%        >> Jitter = Pn2Jitter(f, Lf, 2.25e9)
%             Jitter = 1.566598599875678e-012
%       Comparing ADI application note{$} calculations at fc = 2.25GHz
%        Pn2Jitter.m:  1.56659859987568ps
%        MT-008:       1.57ps
%        Raltron {&}:  1.56659857673259ps
%        JitterTime:   1.529ps--excluding the (4.6GHz, -146) data point,
%                               as 1GHz is the maximum allowed
%    {$} Analog Devices, Inc. (ADI) application note MT-008:
%                        "Converting Oscillator Phase Noise to Time Jitter"
%        http://www.analog.com/en/content/0,2886,760%255F%255F91502,00.html
%    {&} Raltron web RMS Phase Jitter calculator:
%                                       "Convert SSB phase noise to jitter"
%        http://www.raltron.com/cust/tools/osc.asp
%           Note:  Raltron is restricted to f(min) = 10Hz;
%                  therefore it cannot be used in this example [1].
%
%  [3]   >> f = [10^2 10^3 10^4  200*10^6]; Lf = [-125 -150 -174 -174];
%        >> Jitter = Pn2Jitter(f, Lf, 100e6)
%             Jitter = 6.4346e-014
%       Comparing ADI application note{$} calculations at fc = 100MHz
%        Pn2Jitter.m: 0.064346ps
%        MT-008:      0.064ps
%        JitterTime:  0.065ps
%
% Note:
%   f and Lf must be the same length, lest you get an error and this
%         Improbable Result:  Jitter = 42 + 42i.
%
%  (A spreadsheet, noise.xls, is available from Wenzel Associates, Inc. at 
%   http://www.wenzel.com, "Allan Variance from Phase Noise."
%   It requires as input tangents to the plotted measured phase noise data,
%   with slopes of 1/(f^n)--not the actual data itself--for the
%   calculation.  The app. note from fordahl discusses this method, in
%   addition to numerical, to calculate jitter.  This graphical straight-
%   line approximation integration technique tends to underestimate total
%   RMS jitter.)
%
%  [4]   Data can also be imported directly from an Aeroflex PN9000 ASCII
%         file, after removing extraneous text.  How to do it:
%        (1) In Excel, import the PN9000 data file as Tab-delimited data,
%        (2) Remove superfluous columns and first 3 rows, leaving 2 columns
%             with frequency (Hz) and Lf (dBc/Hz) data only. 
%             (With the new PN9000 as of April 2006, only the first row
%             is to be removed, and there are only two columns.
%             I may take advantage of this in an updated version of this
%              program,thereby eliminating the need to edit the data),
%        (3) Save As -> Text (MS-DOS) (*.txt), e.g., a:\Stuff.txt, 
%        (4) At the MATLAB Command Window prompt:
%             >> load 'a:\Stuff.txt' -ascii
%            Now Stuff is a MATLAB workspace variable with the
%             phase noise data, 
%        (5) >> Pn2Jitter(Stuff(:,1), Stuff(:,2), fc);
%              (assuming fc has been defined)
%       One 10MHz carrier data set resulted in the following:
%        Pn2Jitter.m:         368.33fs
%        PN9000 calculation:  375fs

% Runs at least as far back as MATLAB version 5.3 (R11.1).
%
% Copyright (c) 2005 by Arne Buck, Axolotol Design, Inc. Friday 13 May 2005
%   arne   (d 0 t)   buck   [a +]   alum   {D o +}   mit   (d 0 +}   e d  u
%   $Revision: 1.2 $  $Date: 2005/05/13 23:42:42 $
%
% License to use and modify this code is granted freely, without warranty,
%  to all as long as the original author is referenced and attributed
%  as such.  The original author maintains the right to be solely
%  associated with this work.  So there.

% Bug fixes to resolve problematic data resulting in division by 0, or
%  excessive exponents beyond MATLAB's capability of realmin (2.2251e-308)
%  and realmax (1.7977e+308); no demonstrable effect on jitter calculation
% AB 18May2005 Fix /0 bug for *exactly* -10.000dB difference in adjacent Lf
% AB 24May2005 Fix large and small exponents resulting from PN9000 data
% AB 11May2007 Improve documentation, update URLs
% AB  5May2008 Verify and update URLs
tic
%%  It's almost nine o'clock.  We've got to go to work.
L = length(Lf); 
if L == length(f)
% Fix ill-conditioned data.
I=find(diff(Lf) == -10); Lf(I) = Lf(I) + I/10^6; % Diddle adjacent Lf with
                                             % a diff=-10.00dB, avoid ai:/0
% Just say "No" to For loops.
lp = L - 1; Lfm = Lf(1:lp); LfM = Lf(2 ); % m~car+, M=cdr
fm  = f(1:lp); fM = f(2 );  ai = (LfM-Lfm) ./ (log10(fM) - log10(fm));
% Cull out problematic fine-sieve data from the PN9000.
Iinf = find( (fm.^(-ai/10) == inf) | fm.^(-ai/10)<10^(-300)); % Find Inf

fm(Iinf) = []; fM(Iinf-1) = []; Lfm(Iinf) = []; LfM(Iinf-1) = [];
ai(Iinf) = []; f(Iinf) = []; Lf(Iinf) = [];

% Where's the beef?
Jitter = ...
    1/(2*pi*fc)*sqrt(2*sum( 10.^(Lfm/10) .* (fm.^(-ai/10)) ./ (ai/10+1)...
    .* (fM.^(ai/10+1) - fm.^(ai/10+1)) ));

else
    disp('> > Oops!');
    disp('> > > The f&Lf vector lengths are unequal.  Where''s the data?')
    Jitter = sqrt(sqrt(-12446784));
end % if L
toc

corner variables in adexl

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If I have to add two variables in corner setup of ADEXL, is there a way to specify them as connected like ordered set. For e.g if var1 can take {10 20} and  var2 {0 var1} -- so the net runs {var1 var2} will be {10 0} {20 0} {10 10} {20 20} -- sometimes more complicated sets are required where we need to explicity specify the set of {var1 var2} as some combinations are invalid and should be pruned.

Thanks

Bhavin


Job name in adexl and directory where it will be saved

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When I start a new job in ADEXL, it is named "Interactive.nnn" etc. I cannot edit that name while the run is in progress. Most of times I come back later and cannot recollect what that run was for. Is there a way to mention the name upfront before starting the job. Also at times the job gets stored in sub directories of totally different module - how to verify the saved location before starting the job.

Thanks

Bhavin

ADE-XL: possible to reuse Matlab-type outputs in other scalar outputs?

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Hi! Is it possible in ADE-XL to have (scalar) outputs that take as input the values returned by Matlab-type outputs ("measurements")?

For example: I have a Matlab output which calculates SNDR for an ADC taking into account calibration. Now I'd like to use that value as input to calculate a Figure-of-Merit=SNDR+10log10(Bandwidth/Power), but creating this expression in the calculator (as I would normally do if SNDR were calculated inside Virtuoso and not in Matlab) doesn't seem to work (I get in the results tab the text "eval error" for this output).

Thanks in advance for any help!

Regards, Jorge.

VerilogA Modelling for Skin Effect

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Hi all,

I'm trying to model skin effect using VerilogA. And I got the sample from  Ken's website: https://designers-guide.org/modeling/ind.pdf

Here's the model:

`include "constants.vams"
`include "disciplines.vams"

module skin_effect(p, n);
electrical p, n;
parameter real f0=1 from (0:inf);
parameter real f1=10 from (f0:inf);
parameter real r0=1 from (0:inf);
`define lumps 100
real mult, mult2, wp, wz;
real zeros[0:2*`lumps-1], poles[0:2*`lumps-1];
integer i;
    analog begin
        @(initial_step("static")) begin
            mult = pow(f1/f0, 1.0/(4*`lumps)); //May the factor in front of lumps, we can change.
            mult2 = mult*mult;
            wz = 2*`M_PI*mult*f0;
            wp = mult2*wz;
            for (i=0; i<`lumps; i=i+1) begin
                zeros[2*i] = -wz;
                zeros[2*i+1] = 0;
                poles[2*i] = -wp;
                poles[2*i+1] = 0;
                wz = mult2 * wp;
                wp = mult2 * wz;
            end
        end
        V(p,n) <+ r0*laplace_zp(I(p,n), zeros, poles);
    end
endmodule

When I simulated this, I found that both the real and imaginary parts are cut off at around 5MHz. 

I experimented with lumps around, but still got the same cut off, any one can shine some light on this problem is greatly appreciated!

Thank you very much,

Menghan

Layout Suit L Editor: Transistors Properties and Pin Definition

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Hello,

I'm working with the TSMC 0.18um PDK for our Labs. I faced two problems which are new in this PDK for me against the X-Fab or AMS. I will be appreciated if anyone shares his/her experience towards them.

1. I'm using the Layout L for drawing my layout of the schematic. Why when I import the layout of a transistor and remove the source or drain contacts of it, the diffusion region of the contacts will remain? For example, when two transistors are in the cascode structure, and you don't need to the common node between them, you prefer to remove their contacts that in the layout be able to place two transistors as close as possible (Poly distance). But when the diffusion region remains, you cannot do that. My question is here, is there a different setup for removing the diffusion region of the contact in TSMC PDK? However, I checked it with Layout XL, and it did it automatically (Removing diffusion) for the same structure. How can I do it manually?

2. Regarding the Pin definition in the layout, I cannot define a pin on the poly layer with Poly Pin. I mean that when we want to set a pin on the poly with Poly Pin Layer, it'll not recognize with LVC check as a port. I should use a Poly-MET1 Via and then create a pin with MET1 pin. My question is here that whether TSMC PDK only allows the user to use of Metal for pin definition or not. I haven't faced any problem with Pins have been defined by Metal. 

Best,

Virtuoso ADEXL VIVA Calculator Sum function?

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Hi, 

This might be a dumb question; however, if I want to sum 100's of signals through the VIVA calculator is there an easy way to do it? I don't see a "sum" function. 

Thanks, 

PM 

calculator returns 0 for 1/2/3.14159

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I am using IC6.1.7-64b.500.23

I find a similar post on this forum, I am doing a similar thing.

https://community.cadence.com/cadence_technology_forums/f/custom-ic-design/36566/getting-result-0-or-nil-from-ocean-script/1349379#1349379

What I see is, in calculator from ADE-L/ADE-XL and ADE Assembler.

If I put 1/2 in calculator, it will return 0.

If I put 1/3.14 in calculator, it will return correctly, with 318.5E-3

If I put 1/2/3.14 in calculator, it will return 0.

If I put 1/3.14/2 in calculator, it will return correctly, with 159.2E-3.

If I put 1/(2*3.14159) in calculator, it will return correctly, with 159.2E-3.

Everyting divide by 2 will results in 0.

.cdsinit command for schematic pin/net collision setting

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In .cdsenv  there is a setting that checks for pin/netname collisions:

schematic       srcPinNetCollision      cyclic  "error"

How can I set this in .cdsinit ?


Layout: Cannot change terminal from scalar to bus

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Hello everyone,

I have a layout in which a scalar pin exists. Now I want to change this pin to a bus pin. But if I try this, I get the error 

Edit Properties
Cannot change terminal Name 'Vbb_lp6_PA' to 'Vbb_lp6_PA<0>'.
Error creating Terminal.

This problem I have very often. And my colleagues too.

Can anyone tell me, how to solve this problem?

Thank you very much!
Sascha

using the switch in the analoglib

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Hello, i'm trying to use the ideal switch (relay) from cadencelib to create a 50MHz clock signal from a variable DC power supply. I have connected the relay with a vsource with the required frequency and set the switch open to 0v and close to 3.3v and the vsource with a pulse of 20MHz from 0 to 3.3v. Now whenever i simulate it i get the same dc voltage on the input and not the required clock. Does anyone know why this is happening?

noise/jitter analysis of CDR in cadence

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Dear sir,

I am designing a 5Gbs clock and data recovery using TSMC 0.18um library. I would like to generate an eye diagram and find p-p/rms jitter of my circuit. All of my circuits are using the TSMC tech lib.

Simulator version: MMSIM_12.11.284_lnx86 , IC51.41.15 . 

Subcircuits in my CDR: PD, FD, LCVCO, LPF, BUFFER. (Referenceless CDR

Input source: analogLib -> vsource -> bit. (A 5Gbs random data

I run transient analysis before but the pp clock jitter I got is extremely small(1.8ps) which seems extremely wrong comparing to others work .

Question:

1. Is transient analysis the only way to get the eye diagram? If so, should I turn on the transient noise and noise contribution? how to set these thing?

2. Should i perform other analysis at the same time when I run transient analysis?(ex: pnoise ...etc

I am confused about noise analysis in cadence while I know maybe some noise model already included in TSMC library

Thank you

Simulating circuit on PSPICE Convergence error

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I'm trying to simulate an one bit ADC using only mosfet transistors but keeps giving me an convergence error

The model info for each of the transistors are 

.model MbreakP PMOS LEVEL 3
+ TOX = 9E-9 COX = 3.8E-15 GAMMA = 0
+ LAMBDA = 0.1 CGDO = 500E-12 CGSO = 500E-12
+ VTO =-0.8 KP=68E-6 COX=3.8E-15

.model MbreakN NMOS LEVEL = 3
+ TOX = 9E-9 COX = 3.8E-15 GAMMA = 0
+ LAMBDA = 0.1 CGDO = 500E-12 CGSO = 500E-12
+ VTO =0.7 KP=190E-6 COX=3.8E-15

Here are the screenshot of the PSPICE error and the design circuit

drive.google.com/open

Can anyone pinpoint what exactly is wrong here? Thank you

how to set libmanager open automatically as ciw

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Hi,

Is there anyway to set libmanager open automatically as ciw when cadence is starting ?

Thanks

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