Could not be opened for writing (Permission denied on library).
The AMS simulations on Cadence Virtuoso works fine without any permission issue. But when I netlist the AMS Configuration for running along with UVM and run simulations, I face “permission denied on...
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ADE Debug Environment: Plot to ViVA Service is not supported yet
I am using ADE Assembler with its Improve Yield mode.It works nice, after a few iterations, that includes GlobalOpt and MonteCarlo, it stops with a better yield.However, how can I get the new variable...
View ArticleOP annotation of expression that evaluates voltages of terminals' nets.
Hello,I have faced some practical problem, when it is need for schematic subcircuit to evaluate voltage terminal difference like G-S and annotate it as OP point parameter.With respect to existing...
View ArticleParaViwe from EMX GUI 6.3 issue
Dear all,I am trying to visualize the mesh of a layout simulated with EMX 6.3 from the GUI of ICADVM20.1-64b.500.33. To do this I have:1) verified my system's compatibility as described here: Setting...
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Is there any difference using Calibre and Spectre view to run simulation with...
Hi guys, I'm recently confusing running my post-simulation with parasitic extracted. Two ways are used to create the circuit to be test from the same layout, but I get different simulation results.All...
View ArticleHelp on creating layout for a symmetric circuit by stitching two "half-layout"
Hi all.Recently I was given a symmetric circuit and told to create a layout for it. Under my tutor's instruction, I removed half of the instances and created a half-circuit, from which I created a...
View ArticleIs there a way to set the net name as variable in a schematic?
Hi there,Is there a way to set a net name as variable?My ultimate goal is:Sweep a variable from 1~100.And have a node named : Node<1:100>And want to use Node<n> in a specific node (variable...
View ArticleMonte Carlo "Process"
when you do Monte Carlo Process simulation, what does it represent? the die to die variations or the lot to lot variations.
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4-Switch Buck-Boost Converter
HELLO!I ALREADY SIMULATED A 4-SWITCH BUCK-BOOST CONVERTER USING MATLAB SIMULINK AND THE RESULTS WERE OKAY. NOW, I WANT TO SIMULATE IT USING CADENCE VIRTUOSO BUT IT WON'T OPERATE. CAN YOU HELP ME FIX...
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The usage of the vfreq function in ADE Explorer calculator.
Hi ,all ！I want to use the vfreq function in ADE Explorer calculator to create a curve similar to the one shown in the image below, but I encountered some problems.As shown in the following image，I...
View ArticleADE Spec Comparison: How to set tolerance?
Hi,the default spec tolerance is 10%, but this is often for me too large. I would like to change to 1% for all outputs, but it looks that I have to do this for each row, and I have >50 outputs. Is...
View ArticleDivider noise in a PLL
I am running a transient PLL simulation. I check the phase noise and the jitter. I calculate the phase noise as follows: I check the delay between the input signal and the feedback signal, subtract its...
View ArticleRedefinition of the problem of the Divider Noise in the PLL
I am running a transient PLL simulation. I check the phase noise and the jitter. I calculate the phase noise as following: I check the delay between the input signal and the feedback signal, subtract...
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MTS to set specific model files to post-layout views not working
Hi all,I am trying to simulate a testbench wherein some cells are at schematic level, while others are post layout calibre views. Now because the PDK offers model files tailored for pre and post layout...
View ArticleJitter function
Hello, Can anyone provide me some insights about the jitter function in Cadence (calculator)?Which jitter does it calculate?Many thanks in advance!
View ArticleIssue about config copy
Hi,I would like to copy config_A to config_B. There are some cell views defined in "Tree View" format using Occurences. For inistance, a DFF is used in different places, some DFF adopts schematic view,...
View ArticleRe: Wildcard in exclude extraction nets in Quantus CCL file
I am using Quantus 20.1.1-s233 for extraction and all options are specified using the CCL file. In the interest of speeding up the simulation progress, I would like to exclude a group of bias nets and...
View ArticleTransistor count (dumb question)
HiI'm wondering if there's a way to get the transistor/device count using the tools? I vaguely remember a colleague out of curiosity looking it up and seeing that someone had cleverly looked at an LVS...
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