Adding Spiral Inductors to PDK
I'm trying to add spiral inductors to a PDK that does not natively have them. I'm running into problems when trying to LVS or extract parasitics as the tools just see the spiral as a short. How do I...
View Articleimporting pspice model
Hi, I am now design buck-boost converter.I try to import gate driver model 1EDN7550Bfrom https://www.infineon.com/cms/en/product/power/gate-driver-ics/1edn7550b/I have an error saying Error (SFE-2309)...
View ArticleVirtuoso Layout GXL
Dears,I created 2 Modgen for a cell in the schematic editor, and then I launched layout GXL and generated devices from source and I found the constraints I made (everything is fine tell now).Then I...
View ArticleSave specified output option in ADE XL transient simulations not working
Hi,I am running many transient simulations on a schematic by sweeping global variables in ADE XL. All I want to get out of these is a single transient trace per simulation.I am however noticing that,...
View ArticleEvaluating Outputs For Running ADE Assembler/Explorer Simulations
I have some transient simulations that take a VERY long time to run. But I have some output expressions that can be evaluated in the early parts of the simulations.Is there a way to evaluate all...
View ArticleHow to use the same Plotting Template from different Maestro file?
Hello, I have created a plotting template and been using it from the first maestro, let's call it maestro-A.Then I made a copy of maestro-A into maestro-B.After running a test from maestro-B, which is...
View ArticleHow to set in ADE the width of the Spectre netlist file?
Hi,I want to avoid lines ending width \ and continuation in the next line, and use longer lines instead.How to achieve this?In the Cadence help I only found hints on Verilog netlisting.Bye Stephan
View ArticleSyntax in ADE output expression for finding the minimum of two or more numbers
Product: IC6.1.8An output "A" is defined and its value is returned (i.e., updated, refreshed) per Spectre simulation run. Then I want to define another output "B", whose value is the smallest of output...
View Articlewhen i do ams sim, i want to save a portion of the simulation data?
the state file is no savetime.where i can find it? i use 6.1.7
View ArticleMaking IC6.1.7 run on RHEL8
Hi All,I am trying to run IC 6.1.7 on RHEL8 and I get the following error message:WARNING This OS does not appear to be a Cadence supported Linux configuration.2023/07/18 18:55:14 For more info, please...
View ArticleHow to let VSR or ride to route all term(S/D) not just one Source or Drain ?
Hi All,I am using IC 6.1.8 ISR27 , Launch XL schematic -> XL layout ,It can finish route , but only one Source(S) term or Drain(D) term , in this Device , S./D show the same connect nameHow to...
View ArticleUnable to see the commands on CIW window.
Hi All,Generally, when I used to do any action on Virtuoso Layout, its corresponding command would appear on the CIW window. It would be even a simple "zoom in" using "mouse scroll up" or "zoom out"...
View ArticleFiltering out points in Monte-Carlo post processing?
Hi,ADE has the option to filter points in MC, but for me it looks you can only exclude them for yield calculation, correct?I run a MC analysis with 1000 points, and see that just one point #355 is an...
View ArticleMAESTRO: Print -> DC operating point gives out different operating points for...
I have a design of a two-stage comparator using PMOS input pair followed by a NMOS CS amplifier. I am trying to analyze the "gm", "gds" and other relevant parameters at VDD/2 input. I am however, not...
View ArticleADE XL, ADE Explorer Can not be lauched
1. Introduction ADE XL, ADE Explorer Can not be launched, Virtuoso stuck for minutes and return some error message.I searched the forum and found one similar...
View ArticleHow to do parametric analysis in maestro
Hi,I am trying to do parametric analysis on width of pmos by following steps1. First i created a circuit using Ipar parameter2. Created symbol and passed the parameters in CDFNow I am using the the...
View ArticleSetting xSnapSpacing and ySnapSpacing in .cdsenv not taking effect
Tool: Cadence Virtuoso ICADVM20.1-64b.500.24. Hi,I am trying to pre-set the xSnapSpacing and ySnapSpacing values for layoutXL to the desired values (i.e. 0.001) by loading the customized .cdsenv file...
View ArticleHow to run a Monte Carlo simulation while scanning the temperature?
Hello! I am simulating a integral oscillator. In order to get the period, I use tran simulaton and delay function to get the time interval for Vc to rise through 0.5V. In order to get the relation...
View Articleverilog-a syntax to read a 64-bit binary value from a file
I have a text file with this...
View Articleerror while using QRC to extract the DSPF file of the circuit
I encountered a problem while using QRC to extract the DSPF file of the circuit. However, I couldn't find any relevant solutions. Have others experienced similar issues? Thanks!!![guys20@orion QRC]$...
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