probing signal in av_extracted_RC

Hello,

I'm trying to probe some internal signal nodes of an RC extracted circuit, searching for root cause of a DC  offset.

The simulation is a simple dcOp from ADE-L on a test bench defined by hierarchy editor.

Results-->Print-->DC node voltages  will indeed print the voltage on any node but only as long as that node coincides with a pin.

Any of the other intermediate nodes (separated by presistors)  are selectable and get highlighted but only produce a question mark.

Also the result browser does not get me any further.

I'm sure the simulator computed the all the internal node voltages, but how get them out? 

I tried Outputs-->Save All-->Select signals to output(save)="all" and various settings for "subcktprobelvl"

Also in QRC played with net_name_space = "SCHEMATIC" iso "LAYOUT". Does not make any difference.

Cadence-ic-/06.17.717.

groet

Hans