VerilogA model Monte Carlo Simulation - Histogram Curve

Hi,

I want to try monte carlo analysis for circuits defined in veriloga model. So I have started with the  ahdlLib" "res" cell example provided in the cadence support ((Link) . I have done the following steps to replicate the procedure.

• Modified the verilogA model of "res" cell from ahdlib library as given in the example

module res(vp, vn);

inout vp, vn;

electrical vp, vn;

(* cds_inherited_parameter *) parameter real monteres = 0;

parameter real r = 1k;

localparam real r_effective = r + monteres; // nominal resistance plus

                        // monte-carlo mismatch effect


   analog

      V(vp, vn) <+ (r_effective)*I(vp, vn);


endmodule

• Created res_mismatch.scs file with the following content      

simulator lang=spectre
global 0

parameters monteres=10
statistics {
mismatch {
vary monteres dist=gauss std=5
      }
}

• Created schematic with the modified res cell and vdc source
• Added the model file (res_mismatch.scs) in the ADE L environment  and executed transient simulation. Its working fine. 
   
• As I want to see how my circuit (vdc connected to res cell) current varies with respect to resistance variations using monte carlo simulation, I setup ADE XL environment and configured the test.
• Selected the monte carlo sampling and selected the mismatch statistical variation with number of points as 10

Simulation was completed without any error. But I am not able to get any histogram curve or distribution curve. I want to plot the histogram of circuit current variations with respect to resistance mismatch characteristics.

I think, I am missing few more steps. Kindly help me to get it.

Regards,

Vijay