Hello,
I'm running a transient analysis of a high-Q crystal oscillator along with a verilogA module that I wrote that mimics the controlling digital logic. While I regularly use AC, harmonic balance and hbnoise analyses for many parameters, this particular analysis requires transient to analyze some closed loop response with the controlling digital logic.
For many years I've used this article for transient analysis with crystal oscillators:
While some settings in the article are deprecated now, I still use:
- CX preset in Spectre X
- traponly integration method
- alllocal accuracy parameter
- maxstep of 1/20 of the oscillator period
When the oscillator control inputs are stimulated with vpwl and vdc sources, the oscillator behaves as expected (oscillation is still growing):
But when I add the verilogA module in to the testbench, even if I keep the oscillator inputs connected to the same vpwl/vdc sources, the oscillation dies when enabled. Note - a vpulse source is used to drive the clock input to the verilogA digital logic, but the outputs of that verilogA module are not connected to the circuit in question.
If I decrease the maxstep size substantially, oscillation grows again. I haven't exhaustively searched for where it breaks, but 1/50 of the oscillator period does not work, but 1/500 does.
Finally and maybe most interestingly, if I disconnect the vpulse source driving a clock to the verilogA module, I can go back to a maxstep of 1/20 of the oscillator period!
Are there other settings to prevent this from happening? As you can imagine, setting maxstep to 1/500 of the oscillator period substantially increases simulation time. I've tried changing reltol and abstol settings, but not surprisingly, it's not helping that much, can have negative effects and is slowing down the simulation far more than constraining the maxstep size does.
Virtuoso version: ICADVM20.1-64b.500.27.EHF11746
Spectre version: 21.1.0.582.isr14
Thank you in advance!