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Behavioral modelling using verilogA for a TIA

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Hi folks!

I am working on the behavioral model of a Transimpedance amplifier (TIA) using verilogA. As I am new to the world of behavioral modelling, I wish to get some questions clarified right away:

1) As we have several different topologies for designing a TIA (such as Common gate, common source with resistive feedback, Regulated Cascode, Darlington pair etc.), do I have to write a verilogA code for each topology or should the code be generic irrespective of the topology?

2) In my model, does it make sense to consider transistor/operating point dependent attributes (such as gm, beta, un.Cox, W/L ratios etc.) as real parameters if these appear in my design equations?

3) As input referred noise current is a critical parameter for a TIA, I wish to include that in my model as well. Any leads towards that would be helpful.  Also, in case of a TIA, how do I account for shot noise and flicker noise in the behavioral model ?

Thanks!


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