Hi,
according the Cadebnce suggestions I made such kind of VA module:
// VerilogA for bhvLib, vctemp, veriloga
`include "constants.vams"
`include "disciplines.vams"
module vctemp(in);
parameter real tupdate = 10u from (1p:1];
input in;
electrical in;
real temper=0;
analog begin
@(timer(tupdate,tupdate)) begin
temper = V(in);
$cds_set_temperature(temper);
end
end
endmodule
Without timer I got unfortunately a crash with spectre. But with timer the DC and tran analysis with a thermal RC network (generating Vin) works fine (just a bit slow).
However, I also want to check the stability for my thermal loop, and this does not work well, because the loop gain plots are very noisy with the VA cell in my testbench.
I believe, if we had a continous T update according the the input voltage, stb would work fine, but as mentioned then I got the crashes.
I made an alternative modeling without verilogA and using a vcvs with -2mV//K to mimic the bipolar T-sensor behavior, and that works well also in stb analysis. But it would be great to make stb working also together with that VA module.
Does anybody has an idea to make cds_set_temperature work in stb (or AC) analysis?
Bye Stephan