Hello,
I have a schematic and layout that I'm trying to run through LVS using PVS 16.15.
The schematic contains a number of sub-blocks which come from an IP provider and
only have a CDL netlist available. I include these CDL netlists in the LVS run but I get many mismatch errors
on the sub-blocks.
In the LVS form I choose 'Create CDL' which creates the netlist used for LVS. The problem I see is that
the sub-circuit instantiations in the CDL netlist it creates do not have the same port order as the sub-circuit definitions
in the included CDL netlists.
So my question is what determines the port order for the sub circuits in the CDL netlist that is created for LVDS and how
can I ensure that they match the sub circuit definitions in the cdl netlists provided by the IP provider?
I am using IC6.1.8-64b.500.18
Best Regards,
Anand