Hello all,
I have a veriloga module (just a regulator) in my schematic and when I try to simulation the schematic ADE L Spectre I am getting the following errors in spectre.out
Created directory input.ahdlSimDB/ (775)
Created directory input.ahdlSimDB//5496987385e7949d572f19a4275e89ce.Current_Limiting_Regulator.ahdlcmi/ (775)
Created directory input.ahdlSimDB//5496987385e7949d572f19a4275e89ce.Current_Limiting_Regulator.ahdlcmi/Linux/ (775)
Compiling ahdlcmi module library.
Warning from spectre during AHDL read-in.
WARNING (VACOMP-2397): Compilation failed when using pipe build. Bytecode flow will be used for encrypted VerilogA, and normal file compilation will be used for unencrypted VerilogA.
Compiling ahdlcmi module library.
Error found by spectre during AHDL read-in.
ERROR (VACOMP-1008): Cannot compile ahdlcmi module library. Check the log file input.ahdlSimDB//5496987385e7949d572f19a4275e89ce.Current_Limiting_Regulator.ahdlcmi/Linux//..//ahdlcmi.out for details. Contact your Cadence Customer Support representative with the netlist, log files, behavioral model files, and any other information that can help identify the problem.
ERROR (SFE-91): Error when elaborating the instance Current_Limiting_Regulator. Simulation should be terminated.
I read some questions here before stating the problem may be running 32 bit os, but the linux machine and PC are both 64 bits.
Any insight to this will be helpful.
Thank you,
Kevin