Hi,
I am working with IC.5.1.4 (Cadence version 07/08) together with austriamicrosystems HitKitV3.70. I am trying to run DRC with ASSURA 3.1.6 on my layout but I get the following error message:
Reading the design data...
*WARNING* Inconsistent DBUPerUU in the design
*WARNING* 160 is not the same as 1000
*WARNING* Cell: PRIMLIB pcapacitor symbol
Failed to build VDB.
***** dfIIToVdb terminated abnormally *****
*WARNING* dfIIToVdb exit with bad status.
***** aveng terminated abnormally *****
*WARNING* /ic_tools/v0708/cds/ASSURA.3.1.6/tools/assura/bin/aveng exit with bad status
*WARNING* Status 256
*WARNING* Assura execution terminated
I am using austriamicrosystems setup files with design rules. I have been trying to find why are these errors appearing but still have no clue. Can anyone give me any tips?
Thanks and regards,
Pedro