Hello,
In the layout of my circuit, and by using the "Check against Source", I receieve connectivity note in CAS telling me about illegal weak connection of some of my signal paths,
As for example, I designed a 32 bit synchronous shift register and he complained about the clock wire as an illegal weak. The length of the wire is 400 µm
However, DRC has not reported any issue
is this warning harmful for the real fabrication?
Thanks
Regards