Hello,
I would like to import a model which is written in Spice. In the end, I want a simple symbol which contains this model and which i could place in my other schematics.
The model I want to include in my schematic is the following:
www.diodes.com/.../DMT6016LPS
I tried the following steps:
I tried to open a new cellview and chose the Type "Spice". Then I copied the model text in the new created spiceText file and saved it. I created a "Cellview from Cellview" and got a symbol which doesn't contain any information or netlist I think. That means it is like a open circuit.
Then I tried to use the "Spice In" import. I chose my netlist file and the Spice option as netlist language. I named the "Top Cell" and for the Reference Library List I chose "basic" and "analogLib". As Output view information, I chose netlist. In the tab "Device Map", I mapped some models the following way:
capacitor to cap
DLIM to diode
DSUB to diode
DCGD to diode
resistor to res
I got the output log file and the end of my post.
After that I wrote a config file which contains the imported file as a netlist...
But the symbol doesn't contain any information as it seems.
Could you clarify which way is the correct to include a spice netlist or a spice subckt?
Could you give me a step by step guide on how I can import my Subckt file to generate a valid symbol?
Thank you!
===================
Spice In Log File
===================
Parameter file: /tmp/spiceInPvh1632
Import Parameters:
Netlist file name: ...
Output library name: dmtimport
Output View Type: netlist
Netlist view name: netlist
Reference Library List: basic analogLib dmtimport
Top cell: dmt6016lps
Device-mapping file name: ...
Master Cell for Ground: gnd
Cells to be Overwritten: <all>
Schematic Generation parameter file: /tmp/schOpts_spiceInPvh1632
Simulator: spectre
Output Simulator: spectre
paramCaseValue: default
Language: SPICE
Total number of files: 1.
Netlist File: ...
Total number of Subckts: 1.
Master Cellview Found in dmtimport::DMT6016LPS::netlist
Cellview already exist in output library and overwrite flag is set, hence re-importing
********
Created dmtimport.DMT6016LPS:netlist
Created net 10.
Created term 10.
Created net 20.
Created term 20.
Created net 30.
Created term 30.
Total number of Insts: 15.
Inst: M1
Created net '1'.
Created net '2'.
Created net '3'.
Found net '3'.
Master Cell: 'nmos'.
Did not find 'basic.nmos:symbol'.
Master Cellview: 'analogLib.nmos:symbol' found.
Created instance 'M1'.
Created connection between net '1' and term 'D'.
Created connection between net '2' and term 'G'.
Created connection between net '3' and term 'S'.
Created netSet prop 'bulk_n' between net '3' and term 'B'.
Created propName='model'; propType='string'; propVal='nmos'.
Created propName='l'; propType='string'; propVal='1e-06'.
Created propName='w'; propType='string'; propVal='1e-06'.
Inst: RD
Found net '10'.
Found net '1'.
Master Cell 'resistor' mapped to 'res'.
Did not find 'basic.res:symbol'.
Master Cellview: 'analogLib.res:symbol' found.
Created instance 'RD'.
Created connection between net '10' and term 'PLUS'.
Created connection between net '1' and term 'MINUS'.
Created propName='model'; propType='string'; propVal='resistor'.
Created propName='r'; propType='string'; propVal='0.006728'.
Inst: RS
Found net '30'.
Found net '3'.
Master Cell 'resistor' mapped to 'res'.
Master Cellview: 'analogLib.res:symbol' found.
Created instance 'RS'.
Created connection between net '30' and term 'PLUS'.
Created connection between net '3' and term 'MINUS'.
Created propName='model'; propType='string'; propVal='resistor'.
Created propName='r'; propType='string'; propVal='0.001'.
Inst: RG
Found net '20'.
Found net '2'.
Master Cell 'resistor' mapped to 'res'.
Master Cellview: 'analogLib.res:symbol' found.
Created instance 'RG'.
Created connection between net '20' and term 'PLUS'.
Created connection between net '2' and term 'MINUS'.
Created propName='model'; propType='string'; propVal='resistor'.
Created propName='r'; propType='string'; propVal='1.35'.
Inst: CGS
Found net '2'.
Found net '3'.
Master Cell 'capacitor' mapped to 'cap'.
Did not find 'basic.cap:symbol'.
Master Cellview: 'analogLib.cap:symbol' found.
Created instance 'CGS'.
Created connection between net '2' and term 'PLUS'.
Created connection between net '3' and term 'MINUS'.
Created propName='model'; propType='string'; propVal='capacitor'.
Created propName='c'; propType='string'; propVal='8.475e-10'.
Inst: EGD
Created net '12'.
Master Cellview: 'basic.gnd:symbol' found.
Created net 'gnd!'.
Found net '2'.
Found net '1'.
Master Cell: 'vcvs'.
Master cell CDF data not found for 'basic.vcvs'
Master Cellview: 'analogLib.vcvs:symbol' found.
Created instance 'EGD'.
Created connection between net '12' and term 'PLUS'.
Created connection between net 'gnd!' and term 'MINUS'.
Created connection between net '2' and term 'NC+'.
Created connection between net '1' and term 'NC-'.
Created propName='model'; propType='string'; propVal='vcvs'.
Created propName='egain'; propType='string'; propVal='1'.
Inst: VFB
Created net '14'.
Master Cellview: 'basic.gnd:symbol' found.
Found net 'gnd!'.
Master Cell: 'vsource'.
Did not find 'basic.vsource:symbol'.
Master Cellview: 'analogLib.vsource:symbol' found.
Warning! termOrder of this master has more entries than required. Ignoring the extra entries
Created instance 'VFB'.
Created connection between net '14' and term 'PLUS'.
Created connection between net 'gnd!' and term 'MINUS'.
Created propName='model'; propType='string'; propVal='vsource'.
Created propName='vdc'; propType='string'; propVal='0'.
Inst: FFB
Found net '2'.
Found net '1'.
Master Cell: 'cccs'.
Did not find 'basic.cccs:symbol'.
Master Cellview: 'analogLib.cccs:symbol' found.
Created instance 'FFB'.
Created connection between net '2' and term 'PLUS'.
Created connection between net '1' and term 'MINUS'.
Created propName='model'; propType='string'; propVal='cccs'.
Created propName='vref'; propType='string'; propVal='VFB'.
Created propName='fgain'; propType='string'; propVal='1'.
Inst: CGD
Created net '13'.
Found net '14'.
Master Cell 'capacitor' mapped to 'cap'.
Master Cellview: 'analogLib.cap:symbol' found.
Created instance 'CGD'.
Created connection between net '13' and term 'PLUS'.
Created connection between net '14' and term 'MINUS'.
Created propName='model'; propType='string'; propVal='capacitor'.
Created propName='c'; propType='string'; propVal='6e-10'.
Inst: R1
Found net '13'.
Master Cellview: 'basic.gnd:symbol' found.
Found net 'gnd!'.
Master Cell 'resistor' mapped to 'res'.
Master Cellview: 'analogLib.res:symbol' found.
Created instance 'R1'.
Created connection between net '13' and term 'PLUS'.
Created connection between net 'gnd!' and term 'MINUS'.
Created propName='model'; propType='string'; propVal='resistor'.
Created propName='r'; propType='string'; propVal='1'.
Inst: D1
Found net '12'.
Found net '13'.
Master Cell 'DLIM' mapped to 'diode'.
Did not find 'basic.diode:symbol'.
Master Cellview: 'analogLib.diode:symbol' found.
Created instance 'D1'.
Created connection between net '12' and term 'PLUS'.
Created connection between net '13' and term 'MINUS'.
Created propName='model'; propType='string'; propVal='DLIM'.
Inst: DDG
Created net '15'.
Found net '14'.
Master Cell 'DCGD' mapped to 'diode'.
Did not find 'basic.diode:symbol'.
Master Cellview: 'analogLib.diode:symbol' found.
Created instance 'DDG'.
Created connection between net '15' and term 'PLUS'.
Created connection between net '14' and term 'MINUS'.
Created propName='model'; propType='string'; propVal='DCGD'.
Inst: R2
Found net '12'.
Found net '15'.
Master Cell 'resistor' mapped to 'res'.
Master Cellview: 'analogLib.res:symbol' found.
Created instance 'R2'.
Created connection between net '12' and term 'PLUS'.
Created connection between net '15' and term 'MINUS'.
Created propName='model'; propType='string'; propVal='resistor'.
Created propName='r'; propType='string'; propVal='1'.
Inst: D2
Found net '15'.
Master Cellview: 'basic.gnd:symbol' found.
Found net 'gnd!'.
Master Cell 'DLIM' mapped to 'diode'.
Master Cellview: 'analogLib.diode:symbol' found.
Created instance 'D2'.
Created connection between net '15' and term 'PLUS'.
Created connection between net 'gnd!' and term 'MINUS'.
Created propName='model'; propType='string'; propVal='DLIM'.
Inst: DSD
Found net '3'.
Found net '10'.
Master Cell 'DSUB' mapped to 'diode'.
Did not find 'basic.diode:symbol'.
Master Cellview: 'analogLib.diode:symbol' found.
Created instance 'DSD'.
Created connection between net '3' and term 'PLUS'.
Created connection between net '10' and term 'MINUS'.
Created propName='model'; propType='string'; propVal='DSUB'.
Saved and closed 'dmtimport.DMT6016LPS:netlist'.
INFO (SPICEIN-54): Spice In successfully imported the netlist file ....