Verilog-A white_noise function returns 0 in transient noise simulation

Hi everyone,

How come the white_noise function returns 0 in transient noise simulation?

As a matter of fact, for a reason I ignore, depending on the whether outside probably, sometimes it works, sometimes it doesn't... Rearranging my verilog-A code, changing the variables names, could turn on or off the white_noise function. Any idea?

I use Maestro with AMS Mulithreading.

Thanks a lot in advance.

FYI my ongoing 8-buffers ring VCO verilog-A code, including jitter noise generated by white_noise function:

`include "constants.vams"
`include "disciplines.vams"

module cdr_model_vco_8phases(ckn_out, ckp_out, measperiod_out, test, vctrl, vdd);
output [0:7] ckn_out;
electrical [0:7] ckn_out;
output [0:7] ckp_out;
electrical [0:7] ckp_out;
output measperiod_out;
electrical measperiod_out;
output test;
electrical test;
input vctrl;
electrical vctrl;
input vdd;
electrical vdd;

parameter real pKVDD = 0 ;
parameter real pKVCO = 8e+09 ;
parameter real pFVCO0 = 4e+09 ;

genvar index;
real Ji[0:7];
integer ck_int[0:7];
real freq, del;

real tevent;

analog begin

@( initial_step ) begin
for( index=0; index<=7; index=index+1 ) begin
ck_int[index] = 0;
end

freq = pFVCO0 + pKVCO*V(vctrl) + pKVDD*V(vdd);
if( freq<1e9 ) freq=1e9; // VCO frequency clamp
del = 1.0/(16.0*freq); // unit buffer delay
tevent = $abstime + del;
index = 0;
end

for( index=0; index<=7; index=index+1 ) begin
Ji[index] = white_noise( ( (2p/3)**2 )/2G );
end

@( timer(tevent) ) begin
ck_int[index] = 1-ck_int[index];
freq = pFVCO0 + pKVCO*V(vctrl) + pKVDD*V(vdd);
if( freq<1e9 ) freq=1e9; // VCO frequency clamp
del = 1.0/(16.0*freq) + Ji[index]; // unit buffer delay
tevent = $abstime + del;

if( index==7 ) index=0; else index=index+1;
end

for( index=0; index<=7; index=index+1 ) begin
V(ckp_out[index]) <+ transition( ck_int[index] , 0 , 10f );
V(ckn_out[index]) <+ 1-V(ckp_out[index]);
end

//V(test) <+ Ji[0];

end

endmodule