Problem in simulating an inverter using BSIMCMG

Dear All,
I'm using BSIM CMG model for simulating GAAfet behaviour so I have created (by importing verilogA files) 2 different symbols for ntype and ptype transistors.

I managed to plot their transcharacteristics and everything is ok. However when i try to realize the inverter adding the ntype and ptype symbols created, the input/output characteristic is completely wrong. By ckecking the model parameters after simulations through calculator, i found that the problem is that both symbols used are recognized as "ptype" by cadence in the inverter schematic. This Is very strong since in the symbols created they are correctly setted by me as ntype and ptype by DEVTYPE model parameter.
Can anyone help me?
Thanks a lot.